Tunneling field effect transistors and transistor circuitry employing same

    公开(公告)号:US09941117B2

    公开(公告)日:2018-04-10

    申请号:US14947260

    申请日:2015-11-20

    发明人: Paul R. Berger

    IPC分类号: H01L21/02 H01L29/739

    摘要: A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature molecular beam epitaxy at a growth temperature at or below 500° C.

    METHODS FOR SHALLOW TRENCH ISOLATION FORMATION IN A SILICON GERMANIUM LAYER
    8.
    发明申请
    METHODS FOR SHALLOW TRENCH ISOLATION FORMATION IN A SILICON GERMANIUM LAYER 审中-公开
    用于在硅锗层中沉积分离形成的方法

    公开(公告)号:US20150371889A1

    公开(公告)日:2015-12-24

    申请号:US14310607

    申请日:2014-06-20

    摘要: Methods for processing a substrate include (a) providing a substrate comprising a silicon germanium layer and a patterned mask layer atop the silicon germanium layer to define a feature in the silicon germanium layer; (b) exposing the substrate to a first plasma formed from a first process gas to etch a feature into the silicon germanium layer; (c) subsequently exposing the substrate to a second plasma formed from a second process gas to form an oxide layer on a sidewall and a bottom of the feature; (d) exposing the substrate to a third plasma formed from a third process gas to etch the oxide layer from the bottom of the feature; and (e) repeating (b)-(d) to form the feature in the first layer to a desired depth, wherein the first process gas, the second process gas and the third process gas are not the same.

    摘要翻译: 用于处理衬底的方法包括(a)提供包括硅锗层的衬底和在硅锗层顶上的图案化掩模层以限定硅锗层中的特征; (b)将衬底暴露于由第一工艺气体形成的第一等离子体,以将特征蚀刻到硅锗层中; (c)随后将所述衬底暴露于由第二工艺气体形成的第二等离子体,以在所述特征的侧壁和底部上形成氧化物层; (d)将所述衬底暴露于由第三工艺气体形成的第三等离子体以从所述特征的底部蚀刻所述氧化物层; 和(e)重复(b) - (d)以将第一层中的特征形成期望的深度,其中第一处理气体,第二处理气体和第三处理气体不相同。

    Quantum Dots Made Using Phosphine
    10.
    发明申请
    Quantum Dots Made Using Phosphine 有权
    使用磷化氢制成的量子点

    公开(公告)号:US20140370690A1

    公开(公告)日:2014-12-18

    申请号:US14207084

    申请日:2014-03-12

    IPC分类号: H01L21/02

    摘要: A process is disclosed for producing quantum dots (QDs) by reacting one or more core semiconductor precursors with phosphine in the presence of a molecular cluster compound. The core semiconductor precursor(s) provides elements that are incorporated into the QD core semiconductor material. The core semiconductor also incorporates phosphorus, which is provided by the phosphine. The phosphine may be provided to the reaction as a gas or may, alternatively, be provided as an adduct of another material.

    摘要翻译: 公开了通过使一种或多种芯半导体前体与膦在分子簇化合物存在下反应来制备量子点(QD)的方法。 核心半导体前体提供结合到QD芯半导体材料中的元件。 核心半导体还掺入由磷化氢提供的磷。 膦可以作为气体提供给反应,或者可以提供为另一种材料的加合物。