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    METHOD OF PRODUCING LARGE EMI SHIELDED GaAs AND GaP INFRARED WINDOWS
    1.
    发明公开
    METHOD OF PRODUCING LARGE EMI SHIELDED GaAs AND GaP INFRARED WINDOWS 审中-公开

    公开(公告)号：US20240183075A1

    公开(公告)日：2024-06-06

    申请号：US18073183

    申请日：2022-12-01

    申请人： BAE SYSTEMS Information and Electronic Systems Integration Inc.

    发明人： Peter G. Schunemann ,  Kevin T. Zawilski

    IPC分类号： C30B33/06 ,  C23C16/30 ,  C30B29/42 ,  C30B29/44

    CPC分类号： C30B33/06 ,  C23C16/30 ,  C30B29/42 ,  C30B29/44

    摘要： A method of making GaP window slabs having largest dimensions of greater than 4 inches and GaAs IR window slabs having largest dimensions of greater than 8 inches, includes slicing and dicing at least one smaller GaAs or GaP single crystal boule, which can be a commercial boule, to form a plurality of rectangular slabs. The slabs are ground to have precisely perpendicular edges, which are polished to be ultra-flat and ultra-smooth, for example to a flatness of at least λ/10, and a roughness Ra of less than 10 nanometers. The slab edges are then aligned and fused via optical-contacting/bonding to create a large GaAs or GaP slab having negligible bond interface losses. A conductive, doped GaAs or GaP layer can be applied to the window for EMI shielding in a subsequent vacuum deposition step, followed by applying anti-reflection (AR) coatings to one or both of the slab faces.

    FABRICATION OF LOW-LOSS, LIGHT-WAVEGUIDING, ORIENTATION-PATTERNED SEMICONDUCTOR STRUCTURES
    3.
    发明申请
    FABRICATION OF LOW-LOSS, LIGHT-WAVEGUIDING, ORIENTATION-PATTERNED SEMICONDUCTOR STRUCTURES 有权
    低损耗，轻微波动，方位图形半导体结构的制造

    公开(公告)号：US20140037258A1

    公开(公告)日：2014-02-06

    申请号：US13562560

    申请日：2012-07-31

    申请人： Dan Botez ,  Thomas F. Kuech ,  Luke J. Mawst ,  Steven Christopher Ruder

    发明人： Dan Botez ,  Thomas F. Kuech ,  Luke J. Mawst ,  Steven Christopher Ruder

    IPC分类号： C30B25/04 ,  G02B6/10

    CPC分类号： G02B6/122 ,  C30B25/04 ,  C30B29/403 ,  C30B29/42 ,  C30B29/44 ,  G02B2006/12035 ,  G02B2006/12097

    摘要： Methods for the fabrication of orientation-patterned semiconductor structures are provided. The structures are light-waveguiding structures for nonlinear frequency conversion. The structures are periodically poled semiconductor heterostructures comprising a series of material domains disposed in a periodically alternating arrangement along the optical propagation axis of the waveguide. The methods of fabricating the orientation-patterned structures utilize a series of surface planarization steps at intermediate stages of the heterostructure growth process to provide interlayer interfaces having extremely low roughnesses.

    摘要翻译： 提供了制造取向图案化半导体结构的方法。 该结构是用于非线性频率转换的光波导结构。 这些结构是周期性极化的半导体异质结构，其包括沿波导的光传播轴定期交替布置的一系列材料畴。 制造取向图案化结构的方法利用在异质结构生长过程的中间阶段的一系列表面平面化步骤，以提供具有极低粗糙度的层间界面。

    BASE STRUCTURE FOR III-V SEMICONDUCTOR DEVICES ON GROUP IV SUBSTRATES AND METHOD OF FABRICATION THEREOF
    4.
    发明申请
    BASE STRUCTURE FOR III-V SEMICONDUCTOR DEVICES ON GROUP IV SUBSTRATES AND METHOD OF FABRICATION THEREOF 审中-公开
    第IV组基板上的III-V半导体器件的基本结构及其制造方法

    公开(公告)号：US20100263707A1

    公开(公告)日：2010-10-21

    申请号：US12762256

    申请日：2010-04-16

    申请人： Dan Daeweon Cheong ,  Rafael Nathan Kleiman ,  Manuela Peter ,  Nicholas Komarnycky ,  Bradley Joseph Robinson ,  John Stewart Preston

    发明人： Dan Daeweon Cheong ,  Rafael Nathan Kleiman ,  Manuela Peter ,  Nicholas Komarnycky ,  Bradley Joseph Robinson ,  John Stewart Preston

    IPC分类号： H01L31/05 ,  C30B23/02 ,  H01L21/20

    CPC分类号： C30B25/183 ,  C30B23/02 ,  C30B23/025 ,  C30B29/40 ,  C30B29/42 ,  C30B29/44 ,  H01L31/1852 ,  Y02E10/544

    摘要： The structure presented herein provides a base structure for semiconductor devices, in particular for III-V semiconductor devices or for a combination of III-V and Group IV semiconductor devices. The fabrication method for a base substrate comprises a buffer layer, a nucleation layer, a Group IV substrate and possibly a dopant layer. There are, in a general aspect, two growth steps: firstly the growth of a lattice-matched III-V material on a Group IV substrate, followed by secondly the growth of a lattice-mismatched III-V layer. The first layer, called the nucleation layer, is lattice-matched or closely lattice-matched to the Group IV substrate while the following layer, the buffer layer, deposited on top of the nucleation layer, is lattice-mismatched to the nucleation layer. The nucleation layer can further be used as a dopant source to the Group IV substrate, creating a p-n junction in the substrate through diffusion. Alternatively a separate dopant layer may be introduced.

    摘要翻译： 本文中给出的结构提供了半导体器件的基础结构，特别是对于III-V半导体器件或III-V和IV族半导体器件的组合。 基底衬底的制造方法包括缓冲层，成核层，第IV族衬底和可能的掺杂剂层。 在一般方面，存在两个生长步骤：首先在IV族衬底上生长晶格匹配的III-V材料，其次是晶格失配的III-V层的生长。 称为成核层的第一层与第IV族基质晶格匹配或紧密地晶格匹配，而沉积在成核层顶部的下一层缓冲层与成核层晶格失配。 成核层可以进一步用作第IV族衬底的掺杂剂源，通过扩散在衬底中产生p-n结。 或者，可以引入单独的掺杂剂层。

    NANOSTRUCTURES FORMED OF BRANCHED NANOWHISKERS AND METHODS OF PRODUCING THE SAME
    5.
    发明申请
    NANOSTRUCTURES FORMED OF BRANCHED NANOWHISKERS AND METHODS OF PRODUCING THE SAME 有权
    分离纳米颗粒形成的纳米微粒及其生产方法

    公开(公告)号：US20100151661A1

    公开(公告)日：2010-06-17

    申请号：US12704754

    申请日：2010-02-12

    申请人： Lars Ivar Samuelson ,  Knut Wilfried Deppert

    发明人： Lars Ivar Samuelson ,  Knut Wilfried Deppert

    IPC分类号： H01L21/20

    CPC分类号： C30B29/62 ,  B01J21/185 ,  B01J37/0238 ,  B82Y20/00 ,  B82Y30/00 ,  C30B11/12 ,  C30B29/40 ,  C30B29/44 ,  C30B29/605 ,  H01L21/02392 ,  H01L21/02433 ,  H01L21/02543 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L31/035236 ,  H01L31/03529 ,  H01L31/101 ,  H01L33/18 ,  H01L33/20 ,  H01L33/24 ,  Y02E10/50 ,  Y10S438/96 ,  Y10S438/962 ,  Y10S977/754 ,  Y10S977/89 ,  Y10S977/891 ,  Y10S977/921 ,  Y10T428/25

    摘要： A method of forming a nanostructure having the form of a tree, comprises a first stage and a second stage. The first stage includes providing one or more catalytic particles on a substrate surface, and growing a first nanowhisker via each catalytic particle. The second stage includes providing, on the periphery of each first nanowhisker, one or more second catalytic particles, and growing, from each second catalytic particle, a second nanowhisker extending transversely from the periphery of the respective first nanowhisker. Further stages may be included to grow one or more further nanowhiskers extending from the nanowhisker(s) of the preceding stage. Heterostructures may be created within the nanowhiskers. Such nanostructures may form the components of a solar cell array or a light emitting flat panel, where the nanowhiskers are formed of a photosensitive material. A neural network may be formed by positioning the first nanowhiskers close together so that adjacent trees contact one another through nanowhiskers grown in a subsequent stage, and heterojunctions within the nanowhiskers create tunnel barriers to current flow.

    摘要翻译： 形成具有树形形状的纳米结构的方法包括第一阶段和第二阶段。 第一阶段包括在衬底表面上提供一种或多种催化剂颗粒，以及通过每种催化剂颗粒生长第一纳米晶须。 第二阶段包括在每个第一纳米晶须的外围提供一个或多个第二催化剂颗粒，并且从每个第二催化颗粒生长从相应的第一纳米晶须的周边横向延伸的第二纳米晶须。 可以包括进一步的阶段以生长从前一级的纳米晶须延伸出的一个或多个另外的纳米晶须。 可能在纳米晶须内形成异质结构。 这样的纳米结构可以形成太阳能电池阵列或发光平板的组件，其中纳米晶须由感光材料形成。 可以通过将第一纳米晶须紧靠在一起而使得相邻的树木通过在后续阶段中生长的纳米晶须彼此接触而形成神经网络，并且纳米晶须内的异质结形成对当前流动的隧道势垒。

    Nanostructures formed of branched nanowhiskers and methods of producing the same
    6.
    发明授权
    Nanostructures formed of branched nanowhiskers and methods of producing the same 失效
    由分支纳米晶须形成的纳米结构及其制备方法

    公开(公告)号：US07662706B2

    公开(公告)日：2010-02-16

    申请号：US10986438

    申请日：2004-11-12

    申请人： Lars Ivar Samuelson ,  Knut Wilfried Deppert

    发明人： Lars Ivar Samuelson ,  Knut Wilfried Deppert

    IPC分类号： C30B29/62

    CPC分类号： C30B29/62 ,  B01J21/185 ,  B01J37/0238 ,  B82Y20/00 ,  B82Y30/00 ,  C30B11/12 ,  C30B29/40 ,  C30B29/44 ,  C30B29/605 ,  H01L21/02392 ,  H01L21/02433 ,  H01L21/02543 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L31/035236 ,  H01L31/03529 ,  H01L31/101 ,  H01L33/18 ,  H01L33/20 ,  H01L33/24 ,  Y02E10/50 ,  Y10S438/96 ,  Y10S438/962 ,  Y10S977/754 ,  Y10S977/89 ,  Y10S977/891 ,  Y10S977/921 ,  Y10T428/25

    摘要： A method of forming a nanostructure having the form of a tree, comprises a first stage and a second stage. The first stage includes providing one or more catalytic particles on a substrate surface, and growing a first nanowhisker via each catalytic particle. The second stage includes providing, on the periphery of each first nanowhisker, one or more second catalytic particles, and growing, from each second catalytic particle, a second nanowhisker extending transversely from the periphery of the respective first nanowhisker. Further stages may be included to grow one or more further nanowhiskers extending from the nanowhisker(s) of the preceding stage. Heterostructures may be created within the nanowhiskers. Such nanostructures may form the components of a solar cell array or a light emitting flat panel, where the nanowhiskers are formed of a photosensitive material. A neural network may be formed by positioning the first nanowhiskers close together so that adjacent trees contact one another through nanowhiskers grown in a subsequent stage, and heterojunctions within the nanowhiskers create tunnel barriers to current flow.

    摘要翻译： 形成具有树形形状的纳米结构的方法包括第一阶段和第二阶段。 第一阶段包括在衬底表面上提供一种或多种催化剂颗粒，以及通过每种催化剂颗粒生长第一纳米晶须。 第二阶段包括在每个第一纳米晶须的外围提供一个或多个第二催化剂颗粒，并且从每个第二催化颗粒生长从相应的第一纳米晶须的周边横向延伸的第二纳米晶须。 可以包括进一步的阶段以生长从前一级的纳米晶须延伸出的一个或多个另外的纳米晶须。 可能在纳米晶须内形成异质结构。 这样的纳米结构可以形成太阳能电池阵列或发光平板的组件，其中纳米晶须由感光材料形成。 可以通过将第一纳米晶须紧靠在一起而使得相邻的树木通过在后续阶段中生长的纳米晶须彼此接触而形成神经网络，并且纳米晶须内的异质结形成对当前流动的隧道势垒。

    Method of growing single crystal of compound semiconductor
    7.
    发明授权
    Method of growing single crystal of compound semiconductor 失效
    生长化合物半导体单晶的方法

    公开(公告)号：US5342475A

    公开(公告)日：1994-08-30

    申请号：US893333

    申请日：1992-06-03

    申请人： Seikoh Yoshida ,  Toshio Kikuta

    发明人： Seikoh Yoshida ,  Toshio Kikuta

    IPC分类号： C30B11/00 ,  C30B21/06

    CPC分类号： C30B29/40 ,  C30B11/002 ,  C30B11/003 ,  C30B29/42 ,  C30B29/44

    摘要： Disclosed is a method of growing a single crystal of a compound semiconductor, in which a compound semiconductor material is loaded in a vertical crucible and the compound semiconductor material is converted into a single crystal by utilizing a seed disposed in the center of the bottom portion of the vertical crucible. The method has the steps of using a crucible having a substantially flat bottom as part of said vertical crucible, producing a melt by melting the compound semiconductor material causing the melt to have a temperature distribution that an isotherm of the melt is convex with a drift toward the melt side, rapidly lowering the temperature of that portion of the melt of the compound semiconductor material which neighbors the seed in the initial stage of the crystal growth to a supercooled state so as to permit a crystal growth from the seed in substantially the horizontal direction without allowing the crystal to grow in a vertical direction to form a crystal of a desired diameter, and solidifying the compound semiconductor material in a molten state while maintaining a temperature gradient that the temperature of the melt gradually uptilts from the lower portion toward the upper portion so as to obtain a single crystal of the compound semiconductor. The particular method permits efficiently growing a single crystal of a large diameter while suppressing a twin generation.

    摘要翻译： 公开了一种生长化合物半导体的单晶的方法，其中将化合物半导体材料装载在垂直坩埚中，并且化合物半导体材料通过利用布置在底部的中心的晶种转化为单晶 立式坩埚。 该方法具有以下步骤：使用具有基本平坦的底部的坩埚作为所述垂直坩埚的一部分，通过熔化化合物半导体材料产生熔体，使熔体具有使熔体的等温线凸起的温度分布， 熔融侧，在晶体生长的初始阶段将种子附近的化合物半导体材料的熔体部分的温度迅速降低至过冷状态，以允许晶种在大致水平方向上生长 而不允许晶体在垂直方向上生长以形成所需直径的晶体，并且在熔融状态下固化化合物半导体材料，同时保持熔体的温度从下部朝向上部逐渐上升的温度梯度 以获得化合物半导体的单晶。 具体的方法允许有效地生长大直径的单晶，同时抑制双代。

    Method of manufacturing gallium phosphide single crystals with low defect density
    9.
    发明授权
    Method of manufacturing gallium phosphide single crystals with low defect density 失效
    低缺陷密度的磷化镓单晶的制造方法

    公开(公告)号：US4303464A

    公开(公告)日：1981-12-01

    申请号：US130407

    申请日：1980-03-14

    申请人： Takashi Suzuki ,  Shin-ichi Akai ,  Hideki Mori ,  Katsunosuke Aoyagi ,  Takashi Shimoda ,  Kazuhisa Matsumoto ,  Masami Sasaki

    发明人： Takashi Suzuki ,  Shin-ichi Akai ,  Hideki Mori ,  Katsunosuke Aoyagi ,  Takashi Shimoda ,  Kazuhisa Matsumoto ,  Masami Sasaki

    IPC分类号： C30B15/04 ,  C30B15/00 ,  C30B27/02 ,  C30B29/44 ,  H01L21/18 ,  H01L21/208

    CPC分类号： C30B27/02 ,  C30B15/00 ,  C30B29/44

    摘要： Gallium phosphide single crystals with low defect density which are manufactured by the liquid encapsulation Czochralski pulling method and which are characterized in that they are doped or not doped with at least one kind of dopant which is electrically active in gallium phosphide and are so doped as to have at least one dopant such as boron or some other strongly reducing impurity which has a reducing activity equal to or greater than that of boron remain in the crystals in a quantity not less than 1.times.10.sup.17 cm.sup.-3 and the sum of dislocation etch pit density and small conical etch pit density of the surface (111)B which has been subjected to etching for 3 to 5 minutes with RC etchant at a temperature of 65.degree. C..about.75.degree. C. after removing the mechanically damaged layer on the surface does not exceed 1.times.10.sup.5 cm.sup.-2, and a method of manufacturing the crystals.

    摘要翻译： 具有低缺陷密度的磷化镓单晶，其通过液体封装Czochralski拉制法制造，其特征在于它们掺杂或未掺杂至少一种在磷化镓中具有电活性并且掺杂的掺杂剂 具有等于​​或大于硼的还原活性的至少一种掺杂剂如硼或一些其它强还原杂质在晶体中保留不少于1×10 17 cm -3，并且位错蚀刻坑密度和 表面（111）B的小锥形蚀刻坑密度，已经在65℃的温度下用RC蚀刻剂蚀刻3至5分钟。去除表面上的机械损伤层之后的差值75℃ 超过1×10 5 cm -2，以及制造晶体的方法。