n- and p-channel field effect transistors with single quantum well for complementary circuits
    3.
    发明授权
    n- and p-channel field effect transistors with single quantum well for complementary circuits 有权
    具有用于互补电路的单量子阱的n沟道场效应晶体管和p沟道场效应晶体管

    公开(公告)号:US08652959B2

    公开(公告)日:2014-02-18

    申请号:US13756566

    申请日:2013-02-01

    IPC分类号: H01L21/28

    摘要: A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.

    摘要翻译: 在同一器件中单个In x Ga 1-x Sb量子阱用作n沟道和p沟道的互补金属氧化物半导体(CMOS)器件及其制造方法。 In x Ga 1-x Sb层是异质结构的一部分,其在结构的一部分上包括在In x Ga 1-x Sb层上方的Te-δ掺杂的Al y Ga 1-y Sb。 可以通过使用适当的源极,栅极和漏极端子将不具有Te-δ掺杂的AlI y Ga 1-y Sb阻挡层的部分结构制成p-FET,并且保留Te-δ掺杂的Al y Ga 1 -ySb层可以制造成n-FET,使得该结构形成CMOS器件,其中单个In x Ga 1-x Sb量子阱用作异质结构的n-FET部分和p-FET部分的传输沟道。

    N- and p-channel field-effect transistors with single quantum well for complementary circuits
    4.
    发明授权
    N- and p-channel field-effect transistors with single quantum well for complementary circuits 有权
    具有用于互补电路的单量子阱的N沟道场效应晶体管和p沟道场效应晶体管

    公开(公告)号:US08461664B2

    公开(公告)日:2013-06-11

    申请号:US13115453

    申请日:2011-05-25

    IPC分类号: H01L29/20

    摘要: A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.

    摘要翻译: 在同一器件中单个In x Ga 1-x Sb量子阱用作n沟道和p沟道的互补金属氧化物半导体(CMOS)器件及其制造方法。 In x Ga 1-x Sb层是异质结构的一部分,其在结构的一部分上包括在In x Ga 1-x Sb层上方的Te-δ掺杂的Al y Ga 1-y Sb。 可以通过使用适当的源极,栅极和漏极端子将不具有Te-δ掺杂的AlI y Ga 1-y Sb阻挡层的部分结构制成p-FET,并且保留Te-δ掺杂的Al y Ga 1 -ySb层可以制造成n-FET,使得该结构形成CMOS器件,其中单个In x Ga 1-x Sb量子阱用作异质结构的n-FET部分和p-FET部分的传输沟道。

    Low-defect-density crystalline structure and method for making same
    5.
    发明授权
    Low-defect-density crystalline structure and method for making same 失效
    低缺陷密度晶体结构及其制备方法

    公开(公告)号:US07923098B2

    公开(公告)日:2011-04-12

    申请号:US11968544

    申请日:2008-01-02

    IPC分类号: B32B7/02 C30B19/00

    摘要: A low-defect-density crystalline structure comprising a first crystalline material, a layer of second crystalline material epitaxially grown on the first crystalline material, and a layer of third crystalline material epitaxially grown on the second layer such that the second layer is positioned between the first crystalline material and the third crystalline material. The second and third crystalline materials cooperate to form a desirable relationship. The crystalline structures of the second crystalline material and third crystalline material have a higher crystalline compatibility than the first crystalline material and third crystalline material. The layer of second crystalline material is sufficiently thick to form the desirable relationship with the third crystalline material but sufficiently thin for the layer of second crystalline material to be strained. The layer of third crystalline material is grown to a thickness beyond a thickness had the third layer been grown on an unstrained second layer.

    摘要翻译: 包含第一晶体材料,外延生长在第一晶体材料上的第二晶体材料层和在第二层上外延生长的第三晶体材料层的低缺陷密度晶体结构使得第二层位于 第一结晶材料和第三结晶材料。 第二和第三结晶材料配合以形成期望的关系。 第二结晶材料和第三结晶材料的晶体结构具有比第一结晶材料和第三结晶材料更高的结晶相容性。 第二结晶材料层足够厚以与第三结晶材料形成期望的关系,但对于要应变的第二晶体材料层来说足够薄。 如果第三层在无应变的第二层上生长,则将第三晶体材料层生长至超过厚度的厚度。

    Low-Defect-Density Crystalline Structure and Method for Making Same
    6.
    发明申请
    Low-Defect-Density Crystalline Structure and Method for Making Same 失效
    低缺陷密度结晶结构及其制备方法

    公开(公告)号:US20090169843A1

    公开(公告)日:2009-07-02

    申请号:US11968544

    申请日:2008-01-02

    IPC分类号: B32B7/02 C30B19/00

    摘要: A low-defect-density crystalline structure comprising a first crystalline material, a layer of second crystalline material epitaxially grown on the first crystalline material, and a layer of third crystalline material epitaxially grown on the second layer such that the second layer is positioned between the first crystalline material and the third crystalline material. The second and third crystalline materials cooperate to form a desirable relationship. The crystalline structures of the second crystalline material and third crystalline material have a higher crystalline compatibility than the first crystalline material and third crystalline material. The layer of second crystalline material is sufficiently thick to form the desirable relationship with the third crystalline material but sufficiently thin for the layer of second crystalline material to be strained. The layer of third crystalline material is grown to a thickness beyond a thickness had the third layer been grown on an unstrained second layer.

    摘要翻译: 包含第一晶体材料,外延生长在第一晶体材料上的第二晶体材料层和在第二层上外延生长的第三晶体材料层的低缺陷密度晶体结构使得第二层位于 第一结晶材料和第三结晶材料。 第二和第三结晶材料配合以形成期望的关系。 第二结晶材料和第三结晶材料的晶体结构具有比第一结晶材料和第三结晶材料更高的结晶相容性。 第二结晶材料层足够厚以与第三结晶材料形成期望的关系,但对于要应变的第二晶体材料层来说足够薄。 如果第三层在无应变的第二层上生长,则将第三晶体材料层生长至超过厚度的厚度。

    Method for depositing materials containing tellurium and product
    7.
    发明授权
    Method for depositing materials containing tellurium and product 失效
    用于沉积含碲和产品的材料的方法

    公开(公告)号:US4828938A

    公开(公告)日:1989-05-09

    申请号:US851004

    申请日:1986-04-11

    摘要: A method for chemical vapor deposition of materials containing tellurium, such as cadmium telluride and mercury cadmium telluride, wherein the reactant source of the tellurium is a tellurophene or methyltellurol. These reactant sources have high vapor pressures, and the reactant source vapors emitted from the reactant sources have decomposition temperatures of less than about 300.degree. C., so that deposition may be accomplished at low temperatures of about 250.degree. C. The reactant source vapor containing tellurium is mixed with a reactant source vapor containing another substance to be codeposited, such as dimethylcadmium or dimethylmercury, and contacted with a substrate maintained at the deposition temperature, the deposition being preferably accomplished in an inverted vertical chemical vapor deposition reactor.

    摘要翻译: 用于化学气相沉积包含碲的材料的方法,例如碲化镉和碲化汞镉,其中碲的反应物源是一种特氟氯丙烯或甲基碲酚。 这些反应物源具有高蒸气压,并且从反应物源排出的反应物源蒸气具有小于约300℃的分解温度,使得可以在约250℃的低温下进行沉积。含有 将碲与含有待共沉积的另一物质的反应物源蒸气混合,例如二甲基镉或二甲基汞,并与保持在沉积温度的基材接触,沉积优选在倒置的垂直化学气相沉积反应器中完成。

    Preparation of iii{14 v alloys for infrared detectors
    9.
    发明授权
    Preparation of iii{14 v alloys for infrared detectors 失效
    用于红外探测器的III {14V合金的制备

    公开(公告)号:US3634143A

    公开(公告)日:1972-01-11

    申请号:US3634143D

    申请日:1969-05-08

    申请人: AVCO CORP

    发明人: BRENNAN LEO C

    摘要: A single crystal InAs-InSb alloy is prepared on a III-V substrate by flash evaporation of a mixture of granulated InAs and InSb in a vacuum system, subsequent condensation and solidification of the vapor on the substrate and subsequent annealing. The flash evaporation and solidification is thus followed by suitable annealing of the deposited material for several weeks at a temperature close to but below the solidus temperature of the alloy. Prior to annealing, an oxide film may be formed on the deposited alloy to prevent loss of the more volatile constituents.

    摘要翻译: 通过在真空系统中闪蒸制粒的InAs和InSb的混合物,随后在衬底上冷凝和凝固蒸汽并随后退火,在III-V衬底上制备单晶InAs-InSb合金。 闪蒸和固化之后,在接近于或低于合金固相线温度的温度下对沉积材料进行合适的退火几周。 在退火之前,可以在沉积的合金上形成氧化物膜以防止更易挥发的组分的损失。