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公开(公告)号：US12068477B2
公开(公告)日：2024-08-20
申请号：US16679369
申请日：2019-11-11
IPC分类号： H01M4/38 , H01M4/04 , H01M4/1395 , H01M4/36 , H01M4/80
CPC分类号： H01M4/386 , H01M4/0402 , H01M4/1395 , H01M4/366 , H01M4/80
摘要： A method of forming a solid-state lithium ion rechargeable battery may include depositing a metal layer onto a top surface of a substrate, depositing a handle layer onto a top surface of the metal layer, wherein a portion of the handle layer overlaps the metal layer and the substrate, spalling a portion of the substrate thereby forming a spalled substrate layer, porosifying the spalled substrate layer thereby forming a porous substrate layer, depositing an electrolyte layer onto a top surface of the porous substrate layer, wherein the electrolyte layer is in direct contact with the porous substrate layer, and depositing a cathode onto a top surface of the electrolyte layer. The method may include depositing a cathode contact layer onto a top surface of the cathode, wherein the cathode contact layer is in direct contact with the cathode. The porous substrate layer may be made of silicon.
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公开(公告)号：US11864906B2
公开(公告)日：2024-01-09
申请号：US16447324
申请日：2019-06-20
IPC分类号： A61B5/00
CPC分类号： A61B5/4064 , A61B5/0031 , A61B5/0084 , A61B5/742 , A61B2562/0233 , A61B2562/046
摘要： A method includes implanting an implantable biosensor within a subject where the implantable biosensor has an array of light sources and an array of light detectors, activating the array of light sources to direct light signals at a targeted tissue site in the subject, capturing, with the light detectors, the light signals reflected off the targeted site, calculating a roundtrip propagation time for each of the light signals and comparing the roundtrip propagation time for each of the light signals against previous calculated respective roundtrip propagation times to determine an occurrence of a change in the targeted tissue site.
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公开(公告)号：US20230363694A1
公开(公告)日：2023-11-16
申请号：US18359363
申请日：2023-07-26
IPC分类号： A61B5/00
CPC分类号： A61B5/4064 , A61B5/0031 , A61B5/742 , A61B5/0084 , A61B2562/046 , A61B2562/0233
摘要： A method includes implanting an implantable biosensor within a subject where the implantable biosensor has an array of light sources and an array of light detectors, activating the array of light sources to direct light signals at a targeted tissue site in the subject, capturing, with the light detectors, the light signals reflected off the targeted site, calculating a roundtrip propagation time for each of the light signals and comparing the roundtrip propagation time for each of the light signals against previous calculated respective roundtrip propagation times to determine an occurrence of a change in the targeted tissue site.
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公开(公告)号：US11817501B2
公开(公告)日：2023-11-14
申请号：US17481647
申请日：2021-09-22
发明人： Sung Dae Suk , Somnath Ghosh , Chen Zhang , Junli Wang , Devendra K. Sadana , Dechao Guo
CPC分类号： H01L29/785 , H01L25/074 , H01L29/0847 , H01L29/7827
摘要： A semiconductor device fabrication method is provided. The semiconductor device fabrication method includes frontside semiconductor device processing on a frontside of a wafer, flipping the wafer, backside semiconductor device processing on a backside of the wafer and backside and frontside contact formation processing on the backside and frontside of the wafer, respectively.
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公开(公告)号：US11805711B2
公开(公告)日：2023-10-31
申请号：US17034057
申请日：2020-09-28
发明人： Ning Li , Joel P. de Souza , Kevin W. Brew , Devendra K. Sadana
CPC分类号： H10N70/231 , H10B63/00 , H10N70/021 , H10N70/063 , H10N70/841 , H10N70/8833
摘要： A Phase-Change Memory (PCM) device includes a dielectric layer, a bottom electrode disposed in the dielectric layer, a liner material disposed on the bottom electrode, a phase-change material disposed on the liner material, and a top electrode disposed on the phase-change material and in the dielectric layer.
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公开(公告)号：US11742632B2
公开(公告)日：2023-08-29
申请号：US16522873
申请日：2019-07-26
发明人： Jeehwan Kim , Ning Li , Devendra K. Sadana , Brent A. Wacaser
CPC分类号： H01S5/1042 , H01S3/0933 , H01S5/041 , H01S5/1067 , H01S5/11 , H01S5/30 , H01L33/58 , H01L2933/0058 , H01L2933/0083 , H01S5/026
摘要： A laser structure including a Si or Ge substrate, a III-V buffer layer formed on the substrate, a light emitting diode (LED) formed on the buffer layer configured to produce visible light, a lens disposed on the LED to focus light from the LED, a photonic crystal layer formed on the LED to receive the light focused by the lens, and a monolayer semiconductor nanocavity laser formed on the photonic crystal layer for receiving light through the photonic crystal layer from the LED. The LED and the laser are formed monolithically and the LED acts as an optical pump for the laser.
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公开(公告)号：US20230255123A1
公开(公告)日：2023-08-10
申请号：US18192524
申请日：2023-03-29
发明人： Steven J. Holmes , Devendra K. Sadana , David C. Mckay , Jared Barney Hertzberg , Stephen W. Bedell , Ning Li
CPC分类号： H10N60/805 , G06N10/00 , H01L29/66977 , H10N60/12 , G01R33/0358
摘要： Systems and techniques that facilitate quantum tuning via permanent magnetic flux elements are provided. In various embodiments, a system can comprise a qubit device. In various aspects, the system can further comprise a permanent magnet having a first magnetic flux, wherein an operational frequency of the qubit device is based on the first magnetic flux. In various instances, the system can further comprise an electromagnet having a second magnetic flux that tunes the first magnetic flux. In various cases, the permanent magnet can comprise a nanoparticle magnet. In various embodiments, the nanoparticle magnet can comprise manganese nanoparticles embedded in a silicon matrix. In various aspects, the system can further comprise an electrode that applies an electric current to the nanoparticle magnet in a presence of the second magnetic flux, thereby changing a strength of the first magnetic flux.
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公开(公告)号：US20230147329A1
公开(公告)日：2023-05-11
申请号：US17521083
申请日：2021-11-08
IPC分类号： H01L29/78 , H01L29/417 , H01L29/66
CPC分类号： H01L29/785 , H01L29/41791 , H01L29/66795 , H01L2029/7858
摘要： Double gate/gate-all-around and variable threshold voltage MOSFET devices and techniques for fabrication thereof in a single backside process are provided. In one aspect, a MOSFET device includes: a channel in between source/drain regions; at least one first gate disposed on a first side of the channel at a frontside of the MOSFET device; gate spacers offsetting the source/drain regions from the at least one first gate; and at least one second gate disposed on a second side of the channel directly opposite the at least one first gate at a backside of the MOSFET device. At least one gate contact can be present in direct contact with the at least one first gate and the at least one second gate. A method of forming a MOSFET device is also provided.
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公开(公告)号：US20230080397A1
公开(公告)日：2023-03-16
申请号：US17477520
申请日：2021-09-16
发明人： Devendra K. Sadana , Ning Li
摘要： A computing device is provided. The computing device includes a sapphire substrate having a first surface and a second surface opposed to the first surface, a light receiving device having a first surface and a second surface opposed to the first surface, the second surface of the light receiving device coupled to the first surface of the sapphire substrate, a memory coupled to the first surface of the light receiving device, and an antenna coupled to the first surface of the sapphire substrate.
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公开(公告)号：US11581472B2
公开(公告)日：2023-02-14
申请号：US16534882
申请日：2019-08-07
发明人： Devendra K. Sadana , Ning Li , Stephen W. Bedell , Sean Hart , Patryk Gumann
摘要： A gated Josephson junction includes a substrate and a vertical Josephson junction formed on the substrate and extending substantially normal the substrate. The vertical Josephson junction includes a first superconducting layer, a semiconducting layer, and a second superconducting layer. The first superconducting layer, the semiconducting layer, and the second superconducting layer form a stack that is substantially perpendicular to the substrate. The gated Josephson junction includes a gate dielectric layer in contact with the first superconducting layer, the semiconducting layer, and the second superconducting layer at opposing side surfaces of the vertical Josephson junction, and a gate electrically conducting layer in contact with the gate dielectric layer. The gate electrically conducting layer is separated from the vertical Josephson junction by the gate dielectric layer. In operation, a voltage applied to the gate electrically conducting layer modulates a current through the semiconducting layer of the vertical Josephson junction.
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