公开(公告)号：US11437517B2

公开(公告)日：2022-09-06

申请号：US16913012

申请日：2020-06-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Hsien Wu ,  Chih-Hsin Ko ,  Clement Hsingjen Wann

IPC分类号： H01L29/78 ,  H01L29/267 ,  H01L29/10 ,  H01L29/66 ,  H01L21/02 ,  H01L29/778 ,  H01L21/762 ,  H01L21/8252 ,  H01L29/06 ,  H01L29/205

摘要： An embodiment is a structure comprising a substrate, a high energy bandgap material, and a high carrier mobility material. The substrate comprises a first isolation region and a second isolation region. Each of first and second isolation regions extends below a first surface of the substrate between the first and second isolation regions. The high energy bandgap material is over the first surface of the substrate and is disposed between the first and second isolation regions. The high carrier mobility material is over the high energy bandgap material. The high carrier mobility material extends higher than respective top surfaces of the first and second isolation regions to form a fin.

公开(公告)号：US11239075B2

公开(公告)日：2022-02-01

申请号：US16728393

申请日：2019-12-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Hsien Wu ,  I-Sheng Chen

IPC分类号： H01L31/072 ,  H01L31/109 ,  H01L21/02 ,  H01L29/267 ,  H01L29/66 ,  H01L29/78 ,  H01L29/20 ,  H01L29/165 ,  H01L29/06 ,  H01L29/04

摘要： A structure includes a substrate having a first semiconductor material. The substrate has a recess. A bottom portion of the recess has a first sidewall and a second sidewall. The first sidewall intersects the second sidewall. The structure further includes an isolation feature surrounding the recess and a second semiconductor material disposed in the recess and in contact with the first semiconductor material. The second semiconductor material has lattice mismatch to the first semiconductor material.

公开(公告)号：US10516056B2

公开(公告)日：2019-12-24

申请号：US15986426

申请日：2018-05-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： I-Sheng Chen ,  Chih Chieh Yeh ,  Cheng-Hsien Wu

IPC分类号： H01L29/786 ,  H01L21/306 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/267 ,  H01L29/08

摘要： A semiconductor device includes channel layers disposed over a substrate, a source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the channel layers, and a gate electrode layer disposed on the gate dielectric layer and wrapping each of the channel layers. Each of the channel layers includes a semiconductor wire made of a first semiconductor material. The semiconductor wire extends into the source/drain region. The semiconductor wire in the source/drain regions is wrapped around by a second semiconductor material.

公开(公告)号：US20180350590A1

公开(公告)日：2018-12-06

申请号：US15704992

申请日：2017-09-14

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Hsien Wu ,  I-Sheng Chen

IPC分类号： H01L21/02 ,  H01L29/04 ,  H01L29/06 ,  H01L29/78 ,  H01L29/165 ,  H01L29/20 ,  H01L29/267 ,  H01L29/66

CPC分类号： H01L21/0243 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02532 ,  H01L21/02543 ,  H01L21/02546 ,  H01L29/045 ,  H01L29/0649 ,  H01L29/165 ,  H01L29/20 ,  H01L29/267 ,  H01L29/66795 ,  H01L29/7849 ,  H01L29/7851

摘要： A structure includes a substrate including a first semiconductor material; a dielectric feature embedded in the substrate; and a second semiconductor material embedded in the substrate, the second semiconductor material having lattice mismatch to the first semiconductor material, the second semiconductor material having two upper sidewalls and two lower sidewalls, the two upper sidewalls in contact with the dielectric feature, the two lower sidewalls in contact with the substrate, the two lower sidewalls being non-perpendicular to a top surface of the substrate, a bottommost portion of the dielectric feature being lower than a topmost portion of the two lower sidewalls.

公开(公告)号：US10062782B2

公开(公告)日：2018-08-28

申请号：US15429861

申请日：2017-02-10

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chao-Ching Cheng ,  Chih Chieh Yeh ,  Cheng-Hsien Wu ,  Hung-Li Chiang ,  Jung-Piao Chiu ,  Tzu-Chiang Chen ,  Tsung-Lin Lee ,  Yu-Lin Yang ,  I-Sheng Chen

IPC分类号： H01L29/06 ,  H01L29/78 ,  H01L29/10 ,  H01L29/165 ,  H01L29/66

CPC分类号： H01L29/785 ,  H01L21/823431 ,  H01L21/823821 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7845 ,  H01L29/7853

摘要： A semiconductor device includes a fin field effect transistor (FinFET). The FinFET includes a channel disposed on a fin, a gate disposed over the channel and a source and drain. The channel includes at least two pairs of a first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer. The first semiconductor layer has a different lattice constant than the second semiconductor layer. A thickness of the first semiconductor layer is three to ten times a thickness of the second semiconductor layer at least in one pair.

公开(公告)号：US09748388B2

公开(公告)日：2017-08-29

申请号：US15005628

申请日：2016-01-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Hsien Wu ,  Chih-Hsin Ko ,  Clement Hsingjen Wann

IPC分类号： H01L29/78 ,  H01L21/3065 ,  H01L29/08 ,  H01L29/06 ,  H01L29/20 ,  H01L29/22 ,  H01L29/267 ,  H01L29/66

CPC分类号： H01L29/7848 ,  H01L21/3065 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/20 ,  H01L29/22 ,  H01L29/267 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/66795

摘要： A method of fabricating a semiconductor device comprises providing a substrate with a shallow trench isolation (STI) within the substrate and a gate stack. A cavity is formed between the gate stack and the STI. The cavity comprises one sidewall formed by the STI, one sidewall formed by the substrate, and a bottom surface formed by the substrate. A film is grown in the cavity and thereafter an opening formed by removing a first portion of the strained film until exposing the bottom surface of the substrate while a second portion of the strained film adjoins the STI sidewall. Another epitaxial layer is then grown in the opening.

公开(公告)号：US11742213B2

公开(公告)日：2023-08-29

申请号：US17098052

申请日：2020-11-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Hsien Wu

IPC分类号： H01L21/3205 ,  H01L29/786 ,  H01L21/04 ,  H01L21/02 ,  H01L21/324

CPC分类号： H01L21/32055 ,  H01L21/02595 ,  H01L21/0475 ,  H01L29/78672 ,  H01L21/02683 ,  H01L21/02686 ,  H01L21/324

摘要： A method for forming a polycrystalline semiconductor layer includes forming a plurality of spacers over a dielectric layer, etching the dielectric layer using the plurality of spacers as an etch mask to form a recess in the dielectric layer, depositing an amorphous semiconductor layer over the plurality of spacers and the dielectric layer to fill the recess, and recrystallizing the amorphous semiconductor layer to form a polycrystalline semiconductor layer.

公开(公告)号：US11264483B2

公开(公告)日：2022-03-01

申请号：US16725176

申请日：2019-12-23

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Cheng-Hsien Wu

IPC分类号： H01L29/66 ,  H01L29/165 ,  H01L21/02 ,  H01L29/423 ,  H01L29/78 ,  H01L21/311 ,  H01L21/027 ,  H01L29/06 ,  H01L21/3115 ,  H01L29/786 ,  H01L29/775 ,  H01L29/08 ,  H01L29/40 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/088 ,  H01L27/092 ,  H01L27/12 ,  B82Y10/00 ,  H01L29/417

摘要： A method of manufacturing a semiconductor device includes: receiving a semiconductor structure, the semiconductor structure including: a fin structure; a dummy gate across over the fin structure to define a channel region of the fin structure; and a dummy dielectric layer separating the channel region of the fin structure from the dummy gate; removing the dummy gate and the dummy dielectric layer to expose the channel region of the fin structure; and forming a doped interfacial layer covering the channel region of the fin structure, in which the doped interfacial layer includes a dopant selected from the group consisting of Al, Hf, La, Sc, Y and a combination thereof.

公开(公告)号：US11158742B2

公开(公告)日：2021-10-26

申请号：US16939522

申请日：2020-07-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chao-Ching Cheng ,  Chih Chieh Yeh ,  Cheng-Hsien Wu ,  Hung-Li Chiang ,  Jung-Piao Chiu ,  Tzu-Chiang Chen ,  Tsung-Lin Lee ,  Yu-Lin Yang ,  I-Sheng Chen

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L21/8238 ,  H01L21/8234 ,  H01L29/10 ,  H01L29/165

摘要： A semiconductor device includes a fin field effect transistor (FinFET). The FinFET includes a channel disposed on a fin, a gate disposed over the channel and a source and drain. The channel includes at least two pairs of a first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer. The first semiconductor layer has a different lattice constant than the second semiconductor layer. A thickness of the first semiconductor layer is three to ten times a thickness of the second semiconductor layer at least in one pair.

公开(公告)号：US11133403B2

公开(公告)日：2021-09-28

申请号：US16390172

申请日：2019-04-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： I-Sheng Chen ,  Cheng-Hsien Wu ,  Chih-Chieh Yeh

IPC分类号： H01L29/66 ,  H01L29/10 ,  H01L29/739 ,  H01L29/06 ,  H01L27/088 ,  H01L29/775 ,  H01L21/285

摘要： A device includes a substrate, a first doping portion, a second doping portion, a channel, a semiconductor film, a high-k layer, and a gate. The first doping portion and the second doping portion are over the substrate. The channel is over the substrate and between the first doping portion and the second doping portion. The semiconductor film is around the channel. The high-k layer is around the semiconductor film. The gate is over the high-k layer.