公开(公告)号：US09978660B2

公开(公告)日：2018-05-22

申请号：US14213890

申请日：2014-03-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/367 ,  H01L23/36 ,  H01L25/065 ,  H01L25/00 ,  H01L23/13 ,  H01L23/433 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/367 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49894 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15311

Abstract: An integrated circuit package and a method of fabrication of the same are introduced. An opening is formed in a substrate. An embedded heat dissipation feature (eHDF) is placed in the opening in the substrate and is attached to the substrate using a high thermal conductivity adhesive. One or more bonded chips are attached to the substrate using a flip-chip method. The eHDF is thermally attached to one or more hot spots of the bonded chips. In some embodiments, the eHDF may comprise multiple physically disconnected portions. In other embodiments, the eHDF may have a perforated structure.

公开(公告)号：US09653427B2

公开(公告)日：2017-05-16

申请号：US15053440

申请日：2016-02-25

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chi-Hsi Wu ,  Chen-Hua Yu ,  Hsiang-Fan Lee ,  Shih-Peng Tai ,  Tang-Jung Chiu ,  Wen-Chih Chiou

IPC: H01L25/065 ,  H01L21/66 ,  H01L21/78 ,  H01L23/00

CPC classification number: H01L25/0652 ,  H01L21/78 ,  H01L22/14 ,  H01L22/20 ,  H01L22/32 ,  H01L24/09 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/09515 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2225/06596 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A package includes a substrate, the substrate having a first side and a second side, the second side being opposite the first side, and a stack of dies on a first side of the substrate. The package further includes a probing pad on the first side of the substrate, the probing pad being electrically coupled to the stack of dies, and a contact pad on the second side of the substrate, the contact pad being electrically coupled to the stack of dies.

公开(公告)号：US09401395B2

公开(公告)日：2016-07-26

申请号：US15017059

申请日：2016-02-05

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kuo-Chyuan Tzeng ,  Kuo-Chi Tu ,  Chen-Jong Wang ,  Hsiang-Fan Lee

IPC: H01L49/02

CPC classification number: H01L28/40 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/49822 ,  H01L23/5223 ,  H01L24/83 ,  H01L27/06 ,  H01L27/0805 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Decoupling metal-insulator-metal (MIM) capacitor designs for interposers and methods of manufacture thereof are disclosed. In one embodiment, a method of forming a decoupling capacitor includes providing a packaging device, and forming a decoupling MIM capacitor in at least two metallization layers of the packaging device.

Abstract translation: 公开了用于插入件的去耦金属绝缘体金属（MIM）电容器设计及其制造方法。 在一个实施例中，形成去耦电容器的方法包括提供封装装置，以及在包装装置的至少两个金属化层中形成去耦MIM电容器。

公开(公告)号：US09263415B2

公开(公告)日：2016-02-16

申请号：US14265223

申请日：2014-04-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kuo-Chyuan Tzeng ,  Kuo-Chi Tu ,  Chen-Jong Wang ,  Hsiang-Fan Lee

IPC: H01L23/00 ,  H01L23/14 ,  H01L23/498 ,  H01L49/02 ,  H01L27/06 ,  H01L23/31 ,  H01L23/522 ,  H01L27/08

CPC classification number: H01L28/40 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/49822 ,  H01L23/5223 ,  H01L24/83 ,  H01L27/06 ,  H01L27/0805 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Decoupling metal-insulator-metal (MIM) capacitor designs for interposers and methods of manufacture thereof are disclosed. In one embodiment, a method of forming a decoupling capacitor includes providing a packaging device, and forming a decoupling MIM capacitor in at least two metallization layers of the packaging device.

公开(公告)号：US20150262904A1

公开(公告)日：2015-09-17

申请号：US14213890

申请日：2014-03-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/367 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L21/302 ,  H01L23/36 ,  H01L25/065

CPC classification number: H01L23/367 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49894 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15311

Abstract: An integrated circuit package and a method of fabrication of the same are introduced. An opening is formed in a substrate. An embedded heat dissipation feature (eHDF) is placed in the opening in the substrate and is attached to the substrate using a high thermal conductivity adhesive. One or more bonded chips are attached to the substrate using a flip-chip method. The eHDF is thermally attached to one or more hot spots of the bonded chips. In some embodiments, the eHDF may comprise multiple physically disconnected portions. In other embodiments, the eHDF may have a perforated structure.

Abstract translation: 引入集成电路封装及其制造方法。 在基板上形成开口。 将嵌入式散热特征（eHDF）放置在基板的开口中，并使用高导热性粘合剂附着到基板上。 使用倒装芯片方法将一个或多个接合芯片附接到基板。 eHDF热连接到粘合芯片的一个或多个热点。 在一些实施例中，eHDF可以包括多个物理上断开的部分。 在其他实施例中，eHDF可以具有穿孔结构。

公开(公告)号：US20200027809A1

公开(公告)日：2020-01-23

申请号：US16587463

申请日：2019-09-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/36 ,  H01L23/04 ,  H01L23/10 ,  H01L25/065 ,  H01L23/367 ,  H01L23/42 ,  H01L23/498

Abstract: A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.

公开(公告)号：US10340242B2

公开(公告)日：2019-07-02

申请号：US15687943

申请日：2017-08-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Kuan-Yu Huang ,  Tzu-Kai Lan ,  Shou-Chih Yin ,  Shu-Chia Hsu ,  Pai-Yuan Li ,  Sung-Hui Huang ,  Hsiang-Fan Lee ,  Ying-Shin Han

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L25/18

Abstract: A semiconductor device includes a substrate, a package, first conductors and second conductors. The substrate includes a first surface and a second surface opposite to the first surface. The package is disposed over the substrate. The first conductors are disposed over the substrate. The second conductors are disposed over the substrate, wherein the first conductors and the second conductors are substantially at a same tier, and a width of the second conductor is larger than a width of the first conductor.

公开(公告)号：US20190096781A1

公开(公告)日：2019-03-28

申请号：US16206903

申请日：2018-11-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/36 ,  H01L23/498 ,  H01L25/065 ,  H01L23/367 ,  H01L23/04 ,  H01L23/42 ,  H01L23/10 ,  H01L25/18 ,  H01L23/00

CPC classification number: H01L23/36 ,  H01L23/04 ,  H01L23/10 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/29011 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/33519 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/16153 ,  H01L2924/16251 ,  H01L2924/1679 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2924/014

Abstract: A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.

公开(公告)号：US20180350755A1

公开(公告)日：2018-12-06

申请号：US16049015

申请日：2018-07-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Sung-Hui Huang ,  Da-Cyuan Yu ,  Kuan-Yu Huang ,  Pai Yuan Li ,  Hsiang-Fan Lee

IPC: H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L25/00 ,  H01L25/18 ,  H01L25/065 ,  H01L23/373 ,  H01L23/367 ,  H01L23/31 ,  H01L21/56

Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.

公开(公告)号：US20180350754A1

公开(公告)日：2018-12-06

申请号：US15609206

申请日：2017-05-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Sung-Hui Huang ,  Da-Cyuan Yu ,  Kuan-Yu Huang ,  Pai Yuan Li ,  Hsiang-Fan Lee

IPC: H01L23/00 ,  H01L23/367 ,  H01L23/373 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L25/065 ,  H01L25/00 ,  H01L25/18

Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.