公开(公告)号：US20240363586A1

公开(公告)日：2024-10-31

申请号：US18307793

申请日：2023-04-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Su-Chun Yang ,  Jih-Churng Twu ,  Jui Hsuan Tsai ,  Chiao-Chun Chang ,  Chung-Shi Liu ,  Chen-Hua Yu

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L21/82 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

CPC分类号： H01L25/0652 ,  H01L21/561 ,  H01L21/565 ,  H01L21/82 ,  H01L23/3135 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L24/48 ,  H01L2224/08145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/183

摘要： A semiconductor package includes a first integrated circuit, a plurality of second integrated circuits, at least one adhesion layer and a molding compound. The second integrated circuits are bonded onto the first integrated circuit. The at least one adhesion layer extends between the second integrated circuits and on sidewalls of the second integrated circuits. The molding compound extends between the second integrated circuits and on the at least one adhesion layer, wherein a surface of the at least one adhesion layer facing away from the first integrated circuit is substantially coplanar with a surface of the molding compound facing away from the first integrated circuit.

公开(公告)号：US09978709B2

公开(公告)日：2018-05-22

申请号：US15276196

申请日：2016-09-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Su-Chun Yang ,  Chung-Jung Wu ,  Hsiao-Yun Chen ,  Yi-Li Hsiao ,  Chih-Hang Tung ,  Da-Yuan Shih ,  Chen-Hua Yu

IPC分类号： H01L21/44 ,  H01L23/00 ,  B23K1/00 ,  H01L23/498 ,  B23K35/02 ,  B23K35/26 ,  C22C13/00 ,  B23K101/40 ,  B23K103/08

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/262 ,  B23K2101/40 ,  B23K2103/08 ,  C22C13/00 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/13014 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16506 ,  H01L2224/16507 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8193 ,  H01L2224/81947 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3841

摘要： A method of producing a solder bump joint includes heating a solder bump comprising tin above a melting temperature of the solder bump, wherein the solder bumps comprises eutectic Sn—Bi compound, and the eutectic Sn—Bi compound is free of Ag. The method further includes stretching the solder bump to increase a height of the solder bump, wherein stretching the solder bump forms lamellar structures having a contact angle of less than 90°. The method further includes cooling down the solder bump.

公开(公告)号：US20170330855A1

公开(公告)日：2017-11-16

申请号：US15154338

申请日：2016-05-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hang Tung ,  Su-Chun Yang ,  Tung-Liang Shao ,  Chen-Hua Yu

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L24/83 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/94 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/13101 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/16145 ,  H01L2224/29078 ,  H01L2224/29186 ,  H01L2224/32145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80986 ,  H01L2224/81193 ,  H01L2224/83054 ,  H01L2224/83085 ,  H01L2224/83203 ,  H01L2224/83359 ,  H01L2224/83894 ,  H01L2224/94 ,  H01L2224/95085 ,  H01L2225/06513 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10254 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/01046 ,  H01L2924/01079

摘要： A representative system and method for manufacturing stacked semiconductor devices includes disposing an aqueous alkaline solution between a first semiconductor device and a second semiconductor device prior to bonding. In a representative implementation, first and second semiconductor devices may be hybrid bonded to one another, where dielectric features of the first semiconductor device are bonded to dielectric features of the second semiconductor device, and metal features of the first semiconductor device are bonded to metal features of the second semiconductor device. Immersion bonds so formed demonstrate a substantially lower incidence of delamination associated with bond defects.

公开(公告)号：US20230360993A1

公开(公告)日：2023-11-09

申请号：US17738032

申请日：2022-05-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Su-Chun Yang ,  Jih-Churng Twu ,  Jiung Wu ,  Chih-Hang Tung ,  Chen-Hua Yu

IPC分类号： H01L23/31 ,  H01L25/10 ,  H01L25/065 ,  H01L23/29 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L23/3192 ,  H01L25/105 ,  H01L25/0652 ,  H01L23/291 ,  H01L21/565 ,  H01L24/08 ,  H01L24/48 ,  H01L24/73 ,  H01L23/49822

摘要： A die stacking structure, a semiconductor package and a method for manufacturing the die stacking structure are provided. The die stacking structure includes a first device die; second device dies, bonded onto the first device die, and arranged side-by-side; a gap profile modifier, laterally enclosing bottommost portions of the second device dies, wherein a thickness of the gap profile modifier gradually decreases away from sidewalls of the second device dies; and a dielectric material, covering the gap profile modifier and laterally surrounding the second device dies.

公开(公告)号：US20220384352A1

公开(公告)日：2022-12-01

申请号：US17884579

申请日：2022-08-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hang Tung ,  Chen-Hua Yu ,  Tung-Liang Shao ,  Su-Chun Yang ,  Wen-Lin Shih

IPC分类号： H01L23/538 ,  H01L23/373 ,  H01L25/065 ,  H01L21/768 ,  H01L21/50

摘要： A semiconductor device includes a semiconductor substrate, a dielectric structure, an electrical insulating and thermal conductive layer and a circuit layer. The electrical insulating and thermal conductive layer is disposed over the semiconductor substrate. The dielectric structure is disposed over the electrical insulating and thermal conductive layer, wherein a thermal conductivity of the electrical insulating and thermal conductive layer is substantially greater than a thermal conductivity of the dielectric structure. The circuit layer is disposed in the dielectric structure.

公开(公告)号：US20190326251A1

公开(公告)日：2019-10-24

申请号：US16264957

申请日：2019-02-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Ying-Jui Huang ,  Chih-Hang Tung ,  Tung-Liang Shao ,  Ching-Hua Hsieh ,  Chien Ling Hwang ,  Yi-Li Hsiao ,  Su-Chun Yang

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L21/48

摘要： A method includes picking up a first package component, removing an oxide layer on an electrical connector of the first package component, placing the first package component on a second package component after the oxide layer is removed, and bonding the first package component to the second package component.

公开(公告)号：US09263407B2

公开(公告)日：2016-02-16

申请号：US13926905

申请日：2013-06-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Li Hsiao ,  Su-Chun Yang ,  Chih-Hang Tung ,  Da-Yuan Shih ,  Chen-Hua Yu

IPC分类号： H01R43/00 ,  H01L23/00 ,  H05K3/40 ,  H01L23/498

CPC分类号： H05K3/422 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/43 ,  H01L24/45 ,  H01L24/742 ,  H01L24/745 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1134 ,  H01L2224/13016 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13578 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/43125 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45578 ,  H01L2224/45644 ,  H01L2224/45655 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/742 ,  H01L2224/745 ,  H05K3/4015 ,  H05K2201/10318 ,  Y10T29/49208 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  Y10T29/49222 ,  Y10T29/49149

摘要： A method includes forming a plurality of metal posts. The plurality of metal posts is interconnected to form a metal-post row by weak portions between neighboring ones of the plurality of metal posts. The weak portions include a same metal as the plurality of metal posts. A majority of each of the plurality of metal posts is separated from respective neighboring ones of the plurality of metal posts. An end portion of each of the plurality of metal posts is plated with a metal. The plurality of metal posts is disposed into a metal post-storage. The method further includes retrieving one of the metal posts from a metal-post storage, and bonding the one of the metal posts on a metal pad.

摘要翻译： 一种方法包括形成多个金属柱。 多个金属柱相互连接以通过在多个金属柱中的相邻金属柱之间的弱部分形成金属柱。 弱部包括与多个金属柱相同的金属。 多个金属柱中的每一个的大部分与多个金属柱中的相应的相邻的金属柱分离。 多个金属柱中的每一个的端部镀有金属。 多个金属柱设置在金属后储存器中。 该方法还包括从金属柱储存器中取出金属柱中的一个，并将金属柱中的一个接合在金属垫上。

公开(公告)号：US20140262470A1

公开(公告)日：2014-09-18

申请号：US13926905

申请日：2013-06-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Li Hsiao ,  Su-Chun Yang ,  Chih-Hang Tung ,  Da-Yuan Shih ,  Chen-Hua Yu

IPC分类号： H05K1/02 ,  H05K3/06 ,  H05K3/42

CPC分类号： H05K3/422 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/43 ,  H01L24/45 ,  H01L24/742 ,  H01L24/745 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1134 ,  H01L2224/13016 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13578 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/43125 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45578 ,  H01L2224/45644 ,  H01L2224/45655 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/742 ,  H01L2224/745 ,  H05K3/4015 ,  H05K2201/10318 ,  Y10T29/49208 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  Y10T29/49222 ,  Y10T29/49149

摘要： A method includes forming a plurality of metal posts. The plurality of metal posts is interconnected to form a metal-post row by weak portions between neighboring ones of the plurality of metal posts. The weak portions include a same metal as the plurality of metal posts. A majority of each of the plurality of metal posts is separated from respective neighboring ones of the plurality of metal posts. An end portion of each of the plurality of metal posts is plated with a metal. The plurality of metal posts is disposed into a metal post-storage. The method further includes retrieving one of the metal posts from a metal-post storage, and bonding the one of the metal posts on a metal pad.

摘要翻译： 一种方法包括形成多个金属柱。 多个金属柱相互连接以通过在多个金属柱中的相邻金属柱之间的弱部分形成金属柱。 弱部包括与多个金属柱相同的金属。 多个金属柱中的每一个的大部分与多个金属柱中的相应的相邻的金属柱分离。 多个金属柱中的每一个的端部镀有金属。 多个金属柱设置在金属后储存器中。 该方法还包括从金属柱储存器中取出一个金属柱，并将金属柱中的一个接合在金属垫上。

公开(公告)号：US12125794B2

公开(公告)日：2024-10-22

申请号：US18167879

申请日：2023-02-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hang Tung ,  Chen-Hua Yu ,  Tung-Liang Shao ,  Su-Chun Yang ,  Wen-Lin Shih

IPC分类号： H01L23/538 ,  H01L21/50 ,  H01L21/768 ,  H01L23/373 ,  H01L25/065

CPC分类号： H01L23/5384 ,  H01L21/50 ,  H01L21/76802 ,  H01L21/76841 ,  H01L21/76877 ,  H01L23/3736 ,  H01L23/5386 ,  H01L25/0657

摘要： A semiconductor device includes a semiconductor substrate, a dielectric structure, an electrical insulating and thermal conductive layer, an etch stop layer and a circuit layer. The electrical insulating and thermal conductive layer is disposed over the semiconductor substrate. The etch stop layer includes silicon nitride and is disposed between the semiconductor substrate and the electrical insulating and thermal conductive layer. The dielectric structure is disposed over the electrical insulating and thermal conductive layer, wherein a thermal conductivity of the electrical insulating and thermal conductive layer is substantially greater than a thermal conductivity of the dielectric structure. The circuit layer is disposed in the dielectric structure.

公开(公告)号：US20220367255A1

公开(公告)日：2022-11-17

申请号：US17876556

申请日：2022-07-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Li Hsiao ,  Chih-Hang Tung ,  Chen-Hua Yu ,  Tung-Liang Shao ,  Su-Chun Yang

IPC分类号： H01L21/768 ,  H01L21/50

摘要： A bonding method of package components and a bonding apparatus are provided. The method includes: providing at least one first package component and a second package component, wherein the at least one first package component has first electrical connectors and a first dielectric layer at a bonding surface of the at least one first package component, and the second package component has second electrical connectors and a second dielectric layer at a bonding surface of the second package component; bringing the at least one first package component and the second package component in contact, such that the first electrical connectors approximate or contact the second electrical connectors; and selectively heating the first electrical connectors and the second electrical connectors by electromagnetic induction, in order to bond the first electrical connectors with the second electrical connectors.