公开(公告)号：US20220084888A1

公开(公告)日：2022-03-17

申请号：US17535712

申请日：2021-11-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Hung Chen ,  Chih-Hung Hsieh ,  Jhon-Jhy Liaw

IPC分类号： H01L21/8234 ,  H01L29/06 ,  H01L29/36 ,  H01L29/78 ,  H01L29/10 ,  H01L21/762 ,  H01L27/11 ,  H01L29/66 ,  H01L29/165 ,  H01L27/088

摘要： A fin-type field-effect transistor device includes a substrate, insulators, gate stacks and dielectric strips. The substrate includes a first doped region, a second doped region, third doped blocks located above the first doped region and fourth doped blocks located above the second doped region, and fins located above the third doped blocks and the fourth doped blocks, wherein doping concentrations of the third doped blocks are lower than a doping concentration of the first doped region, and doping concentrations of the fourth doped blocks are lower than a doping concentration of the second doped region. The insulators are disposed on the third doped blocks and the fourth doped blocks of the substrate and covering the fins. The dielectric strips are disposed in between the fins, and in between the third doped blocks and the fourth doped blocks. The gate stacks are disposed over the fins and above the insulators.

公开(公告)号：US10102972B2

公开(公告)日：2018-10-16

申请号：US14612740

申请日：2015-02-03

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Wei-Chun Hua ,  Chung-Long Chang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  Jye-Yen Cheng ,  Hua-Chou Tseng

IPC分类号： H01G4/005 ,  H01L23/522 ,  H01L49/02

摘要： A method of forming a capacitor structure includes forming a first set of electrodes having a first electrode and a second electrode, wherein each electrode of the first set of electrodes has an L-shaped portion. The method further includes forming a second set of electrodes having a third electrode and a fourth electrode, wherein each electrode of the second set of electrodes has an L-shaped portion. The method further includes forming insulation layers between the first set of electrodes and the second set of electrodes. The method further includes forming a first L-shaped line plug connecting the first electrode to the third electrode, wherein an entirety of an outer surface of the first L-shaped line plug is recessed with respect to an outer surface of the L-shaped portion of the first electrode. The method further includes forming a second line plug connecting the second electrode to the fourth electrode.

公开(公告)号：US11908864B2

公开(公告)日：2024-02-20

申请号：US17516110

申请日：2021-11-01

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chun-Hung Chen ,  Chih-Hung Hsieh ,  Jhon Jhy Liaw

IPC分类号： H01L27/092 ,  H01L21/265 ,  H01L27/088 ,  H01L21/266 ,  H10B10/00

CPC分类号： H01L27/0924 ,  H01L21/266 ,  H01L21/26513 ,  H01L21/26533 ,  H01L21/26586 ,  H01L27/0886 ,  H01L27/0921 ,  H01L27/0928 ,  H10B10/12

摘要： In a method of manufacturing a semiconductor device, a first-conductivity type implantation region is formed in a semiconductor substrate, and a carbon implantation region is formed at a side boundary region of the first-conductivity type implantation region.

公开(公告)号：US11721589B2

公开(公告)日：2023-08-08

申请号：US17535712

申请日：2021-11-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Hung Chen ,  Chih-Hung Hsieh ,  Jhon-Jhy Liaw

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/36 ,  H01L29/78 ,  H01L29/10 ,  H01L21/762 ,  H01L29/66 ,  H01L29/165 ,  H10B10/00 ,  H01L21/02 ,  H01L21/308 ,  H01L21/027 ,  H01L21/3105 ,  H01L21/306

CPC分类号： H01L21/823431 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/36 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/7853 ,  H10B10/12 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02057 ,  H01L21/0257 ,  H01L21/0262 ,  H01L21/0274 ,  H01L21/02164 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/30604 ,  H01L21/31053 ,  H01L29/66545

摘要： A fin-type field-effect transistor device includes a substrate, insulators, gate stacks and dielectric strips. The substrate includes a first doped region, a second doped region, third doped blocks located above the first doped region and fourth doped blocks located above the second doped region, and fins located above the third doped blocks and the fourth doped blocks, wherein doping concentrations of the third doped blocks are lower than a doping concentration of the first doped region, and doping concentrations of the fourth doped blocks are lower than a doping concentration of the second doped region. The insulators are disposed on the third doped blocks and the fourth doped blocks of the substrate and covering the fins. The dielectric strips are disposed in between the fins, and in between the third doped blocks and the fourth doped blocks. The gate stacks are disposed over the fins and above the insulators.

公开(公告)号：US20240072137A1

公开(公告)日：2024-02-29

申请号：US17900639

申请日：2022-08-31

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Li-Hui Chen ,  Chun-Hung Chen ,  Jhon Jhy Liaw

IPC分类号： H01L29/417 ,  H01L27/02 ,  H01L27/11 ,  H01L27/12 ,  H01L29/78

CPC分类号： H01L29/41775 ,  H01L27/0207 ,  H01L27/1108 ,  H01L27/1237 ,  H01L29/41791 ,  H01L29/7831 ,  H01L29/7855

摘要： A first transistor includes a first gate, a first source/drain, and a first source/drain contact disposed over the first source/drain. The first gate has a first dimension measured in a first lateral direction. The first source/drain contact has a second dimension measured in the first lateral direction. A second transistor includes a second gate, a second source/drain, and a second source/drain contact disposed over the second source/drain. The second gate has a third dimension measured in the first lateral direction. The second source/drain contact has a fourth dimension measured in the first lateral direction. A first ratio of the first dimension and the second dimension is different from a second ratio of the third dimension and the fourth dimension.

公开(公告)号：US11251069B2

公开(公告)日：2022-02-15

申请号：US17018397

申请日：2020-09-11

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Ta-Chun Lin ,  Tien-Shao Chuang ,  Kuang-Cheng Tai ,  Chun-Hung Chen ,  Chih-Hung Hsieh ,  Kuo-Hua Pan ,  Jhon-Jhy Liaw

IPC分类号： H01L21/762 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/092 ,  H01L21/8238

摘要： A method for forming a semiconductor device structure is provided. The method includes forming first and second well regions with different conductivity types in a semiconductor substrate. A well interface is formed between the first and second well regions. The method also includes patterning the semiconductor substrate to form a first fin structure in the first well region, a second fin structure in the second well region, and a first trench between the first and second fin structures. The first trench exposes the well interface in the semiconductor substrate. The method further includes forming insulating spacers on opposite sidewalls of the first trench and etching the semiconductor substrate below the first trench using the insulating spacers as an etch mask, to form a second trench below the first trench. In addition, the method includes filling the first and second trenches with an insulating material.

公开(公告)号：US10068836B2

公开(公告)日：2018-09-04

申请号：US15481802

申请日：2017-04-07

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chien-Chih Ho ,  Chih-Ping Chao ,  Hua-Chou Tseng ,  Chun-Hung Chen ,  Chia-Yi Su ,  Alex Kalnitsky ,  Jye-Yen Cheng ,  Harry-Hak-Lay Chuang

IPC分类号： H01L21/8238 ,  H01L23/48 ,  H01L27/088 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/768

摘要： An integrated circuit includes a substrate, a first inter-layer dielectric (ILD) layer over the substrate, and a gate strip having a first width formed in the first ILD layer. A conductive strip having a second width is provided on the gate strip, with the second width being greater than the first width. The conductive strip is positioned so that the gate strip is covered and a portion of the conductive strip extends over a top surface of the first ILD adjacent the gate strip. A second ILD layer is provided over the conductive strip and the first ILD layer with a contact plug extending through the second ILD layer to provide electrical contact to the conductive strip.

公开(公告)号：US20230326803A1

公开(公告)日：2023-10-12

申请号：US18335065

申请日：2023-06-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Hung Chen ,  Chih-Hung Hsieh ,  Jhon Jhy Liaw

IPC分类号： H01L21/8234 ,  H01L29/06 ,  H01L29/36 ,  H01L29/78 ,  H01L29/10 ,  H01L21/762 ,  H01L29/66 ,  H01L29/165 ,  H01L27/088 ,  H10B10/00

CPC分类号： H01L21/823431 ,  H01L29/0653 ,  H01L29/36 ,  H01L29/7848 ,  H01L29/1095 ,  H01L21/823412 ,  H01L21/823481 ,  H01L21/76224 ,  H01L29/66636 ,  H01L29/165 ,  H01L29/7853 ,  H01L27/0886 ,  H10B10/12 ,  H01L21/0217

摘要： A fin-type field-effect transistor device includes a substrate, insulators, gate stacks and dielectric strips. The substrate includes a first doped region, a second doped region, third doped blocks located above the first doped region and fourth doped blocks located above the second doped region, and fins located above the third doped blocks and the fourth doped blocks, wherein doping concentrations of the third doped blocks are lower than a doping concentration of the first doped region, and doping concentrations of the fourth doped blocks are lower than a doping concentration of the second doped region. The insulators are disposed on the third doped blocks and the fourth doped blocks of the substrate and covering the fins. The dielectric strips are disposed in between the fins, and in between the third doped blocks and the fourth doped blocks. The gate stacks are disposed over the fins and above the insulators.

公开(公告)号：US11728206B2

公开(公告)日：2023-08-15

申请号：US17583707

申请日：2022-01-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Ta-Chun Lin ,  Tien-Shao Chuang ,  Kuang-Cheng Tai ,  Chun-Hung Chen ,  Chih-Hung Hsieh ,  Kuo-Hua Pan ,  Jhon-Jhy Liaw

IPC分类号： H01L27/088 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/06

CPC分类号： H01L21/76232 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/0928 ,  H01L29/0649 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/7851

摘要： A semiconductor device structure is provided. The semiconductor device structure includes a first fin structure and an adjacent second fin structure protruding from the semiconductor substrate and an isolation structure formed in the semiconductor substrate and in direct contact with the first fin structure and the second fin structure. The first fin structure and the second fin structure each include a first portion protruding above a top surface of the isolation structure, a second portion in direct contact with a bottom surface of the first portion, and a third portion extending from a bottom of the second portion. A top width of the third portion is different than a bottom width of the third portion and a bottom width of the second portion.