公开(公告)号：US20080099783A1

公开(公告)日：2008-05-01

申请号：US11976963

申请日：2007-10-30

申请人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Takashi Katsuyama

发明人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Takashi Katsuyama

IPC分类号： H01L23/49 ,  H01L21/44

CPC分类号： H01L23/49562 ,  H01L23/4952 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/00

摘要： A semiconductor integrated circuit includes a power transistor formed on a semiconductor substrate, a plurality of first metal patterns and a plurality of second metal patterns which are formed right above the power transistor and function as a first electrode and as a second electrode of the power transistor, respectively, a plurality of first buses each electrically connected with, of a plurality of first metal patterns, a corresponding first metal pattern, a plurality of second buses each electrically connected with, of a plurality of second metal patterns, a corresponding second metal pattern, wherein one contact pad is provided to each of a plurality of first buses and a plurality of second buses.

摘要翻译： 半导体集成电路包括形成在半导体衬底上的功率晶体管，多个第一金属图案和多个第二金属图案，其形成在功率晶体管的正上方并用作第一电极和作为功率晶体管的第二电极 分别与多个第一金属图形电连接的多个第一总线，相应的第一金属图案，与多个第二金属图案电连接的多个第二总线，相应的第二金属图案 其中，一个接触垫被提供给多个第一总线和多个第二总线中的每一个。

公开(公告)号：US07667316B2

公开(公告)日：2010-02-23

申请号：US11976963

申请日：2007-10-30

申请人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Takashi Katsuyama

发明人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Takashi Katsuyama

IPC分类号： H01L23/49 ,  H01L21/44

CPC分类号： H01L23/49562 ,  H01L23/4952 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/00

摘要： A semiconductor integrated circuit includes a power transistor formed on a semiconductor substrate, a plurality of first metal patterns and a plurality of second metal patterns which are formed right above the power transistor and function as a first electrode and as a second electrode of the power transistor, respectively, a plurality of first buses each electrically connected with, of a plurality of first metal patterns, a corresponding first metal pattern, a plurality of second buses each electrically connected with, of a plurality of second metal patterns, a corresponding second metal pattern, wherein one contact pad is provided to each of a plurality of first buses and a plurality of second buses.

摘要翻译： 半导体集成电路包括形成在半导体衬底上的功率晶体管，多个第一金属图案和多个第二金属图案，其形成在功率晶体管的正上方并用作第一电极和作为功率晶体管的第二电极 分别与多个第一金属图形电连接的多个第一总线，相应的第一金属图案，与多个第二金属图案电连接的多个第二总线，相应的第二金属图案 其中，一个接触垫被提供给多个第一总线和多个第二总线中的每一个。

公开(公告)号：US07687900B2

公开(公告)日：2010-03-30

申请号：US12038060

申请日：2008-02-27

申请人： Shingo Fukamizu ,  Yutaka Nabeshima

发明人： Shingo Fukamizu ,  Yutaka Nabeshima

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L22/32 ,  G01R31/2884 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05073 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/20755 ,  H01L2224/45099 ,  H01L2924/00015 ,  H01L2924/2075

摘要： The semiconductor integrated circuit device includes: an active element, an interlayer insulting film, first and second metal patterns made of a first metal layer formed right above the active element, first and second buses made of a second metal layer formed right above the first metal layer, and contact pads provided on the first and second buses. The contact pad has a probe testing region and a bonding region.

摘要翻译： 半导体集成电路器件包括：有源元件，层间绝缘膜，由形成在有源元件正上方的第一金属层制成的第一和第二金属图案，由形成在第一金属正​​上方的第二金属层制成的第一和第二总线 层和在第一和第二总线上提供的接触焊盘。 接触垫具有探针测试区域和结合区域。

公开(公告)号：US20080128755A1

公开(公告)日：2008-06-05

申请号：US11946282

申请日：2007-11-28

申请人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Yasunori Yamamoto

发明人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Yasunori Yamamoto

IPC分类号： H01L27/088 ,  H01L21/8234

CPC分类号： H01L27/088 ,  H01L21/823475 ,  H01L23/4952 ,  H01L23/49562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01045 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/3011 ,  H01L2924/20651 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2924/20755

摘要： A semiconductor integrated circuit relating to one aspect of the present invention includes a power transistor, at least one or more of first metal patterns functioning as a first electrode of the power transistor and at least one or more of second metal patterns functioning as a second electrode of the power transistor formed in an interlayer insulation film on the transistor, at least one or more of first busses electrically connected to a corresponding first metal pattern of the at least one or more of the first metal patterns, a single second bus electrically connected to the at least one or more of second metal patterns, and a contact pad provided to each of the at least one or more of first busses and the single second bus.

摘要翻译： 涉及本发明的一个方面的半导体集成电路包括功率晶体管，用作功率晶体管的第一电极的至少一个或多个第一金属图案以及用作第二电极的至少一个或多个第二金属图案 形成在晶体管上的层间绝缘膜中的功率晶体管，至少一个或多个电连接到所述至少一个或多个所述第一金属图案中的对应的第一金属图案的第一总线，一个第二总线电连接到 所述至少一个或多个第二金属图案以及提供给所述至少一个或多个所述第一总线和所述单个第二总线中的每一个的接触焊盘。

公开(公告)号：US08138615B2

公开(公告)日：2012-03-20

申请号：US11946282

申请日：2007-11-28

申请人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Yasunori Yamamoto

发明人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Yasunori Yamamoto

IPC分类号： H01L23/48

CPC分类号： H01L27/088 ,  H01L21/823475 ,  H01L23/4952 ,  H01L23/49562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01045 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/3011 ,  H01L2924/20651 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2924/20755

摘要： A semiconductor integrated circuit relating to one aspect of the present invention includes a power transistor, at least one or more of first metal patterns functioning as a first electrode of the power transistor and at least one or more of second metal patterns functioning as a second electrode of the power transistor formed in an interlayer insulation film on the transistor, at least one or more of first busses electrically connected to a corresponding first metal pattern of the at least one or more of the first metal patterns, a single second bus electrically connected to the at least one or more of second metal patterns, and a contact pad provided to each of the at least one or more of first busses and the single second bus.

摘要翻译： 涉及本发明的一个方面的半导体集成电路包括功率晶体管，用作功率晶体管的第一电极的至少一个或多个第一金属图案以及用作第二电极的至少一个或多个第二金属图案 形成在晶体管上的层间绝缘膜中的功率晶体管，至少一个或多个电连接到所述至少一个或多个所述第一金属图案中的对应的第一金属图案的第一总线，一个第二总线电连接到 所述至少一个或多个第二金属图案以及提供给所述至少一个或多个所述第一总线和所述单个第二总线中的每一个的接触焊盘。

公开(公告)号：US20080128826A1

公开(公告)日：2008-06-05

申请号：US11945605

申请日：2007-11-27

申请人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Hideki Nishino

发明人： Shingo Fukamizu ,  Yutaka Nabeshima ,  Hideki Nishino

IPC分类号： H01L29/78 ,  H01L21/4763

CPC分类号： H01L23/49562 ,  H01L23/4952 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05647 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/45099

摘要： The semiconductor integrated circuit includes: a power transistor formed on a semiconductor substrate; a plurality of first metal patterns and a plurality of second metal patterns formed right above the power transistor for acting as first and second electrodes of the power transistor; a first bus electrically connected with the first metal patterns; a second bus electrically connected with the second metal patterns; and one contact pad provided for each of the first and second buses. Each of the first and second buses has at least one slit.

摘要翻译： 半导体集成电路包括：形成在半导体衬底上的功率晶体管; 形成在功率晶体管正上方的多个第一金属图形和多个第二金属图案，用作功率晶体管的第一和第二电极; 与所述第一金属图案电连接的第一总线; 与所述第二金属图案电连接的第二总线; 以及为第一和第二总线中的每一个设置的一个接触垫。 第一和第二总线中的每一个具有至少一个狭缝。

公开(公告)号：US20080203577A1

公开(公告)日：2008-08-28

申请号：US12038060

申请日：2008-02-27

申请人： Shingo Fukamizu ,  Yutaka Nabeshima

发明人： Shingo Fukamizu ,  Yutaka Nabeshima

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L22/32 ,  G01R31/2884 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05073 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/20755 ,  H01L2224/45099 ,  H01L2924/00015 ,  H01L2924/2075

摘要： The semiconductor integrated circuit device includes: an active element, an interlayer insulting film, first and second metal patterns made of a first metal layer formed right above the active element, first and second buses made of a second metal layer formed right above the first metal layer, and contact pads provided on the first and second buses. The contact pad has a probe testing region and a bonding region.

摘要翻译： 半导体集成电路器件包括：有源元件，层间绝缘膜，由形成在有源元件正上方的第一金属层制成的第一和第二金属图案，由形成在第一金属正​​上方的第二金属层制成的第一和第二总线 层和在第一和第二总线上提供的接触焊盘。 接触垫具有探针测试区域和接合区域。

公开(公告)号：US20080278885A1

公开(公告)日：2008-11-13

申请号：US12216843

申请日：2008-07-11

申请人： Yutaka Nabeshima

发明人： Yutaka Nabeshima

IPC分类号： H01G4/00

CPC分类号： H01L27/0207 ,  H01L27/0805

摘要： A placement configuration of MIM type capacitance elements comprises a group of first capacitance elements in which the first capacitance elements as the MIM type capacitance elements are placed in tandem and a group of second capacitance elements in which the second capacitance elements as the MIM type capacitance elements are placed in tandem, wherein the group of first capacitance elements and the group of second capacitance elements are alternately placed in parallel with each other with an equal interval therebetween.

摘要翻译： MIM型电容元件的放置结构包括一组第一电容元件，其中作为MIM型电容元件的第一电容元件串联放置，以及一组第二电容元件，其中第二电容元件作为MIM型电容元件 串联放置，其中第一电容元件组和第二电容元件组交替地以彼此间隔彼此平行地放置。

公开(公告)号：US07978043B2

公开(公告)日：2011-07-12

申请号：US12846451

申请日：2010-07-29

申请人： Yutaka Nabeshima ,  Yuichi Hirofuji

发明人： Yutaka Nabeshima ,  Yuichi Hirofuji

IPC分类号： H01F5/00

CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F41/041 ,  H01F2017/0046 ,  H01L27/08 ,  H01L2924/0002 ,  H01Q1/2283 ,  H01Q7/00 ,  H01Q9/27 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate including at least one of a circuit and a circuit element, and an inductor element having a coil axis extending in a direction parallel to a main surface of the semiconductor substrate and disposed adjacent to the main surface. A main direction of a magnetic field induced by passing a current through the inductor element is parallel to the main surface.

摘要翻译： 半导体器件包括：半导体衬底，包括电路和电路元件中的至少一个;以及电感器元件，其具有沿与半导体衬底的主表面平行的方向延伸并且邻近主表面设置的线圈轴。 通过使电流通过电感器元件而引起的磁场的主要方向平行于主表面。

公开(公告)号：US07515394B2

公开(公告)日：2009-04-07

申请号：US11349082

申请日：2006-02-08

申请人： Yutaka Nabeshima

发明人： Yutaka Nabeshima

IPC分类号： H01G4/005 ,  H01G4/228

CPC分类号： H01L27/0207 ,  H01L27/0805

摘要： A placement configuration of MIM type capacitance elements comprises a group of first capacitance elements in which the first capacitance elements as the MIM type capacitance elements are placed in tandem and a group of second capacitance elements in which the second capacitance elements as the MIM type capacitance elements are placed in tandem, wherein the group of first capacitance elements and the group of second capacitance elements are alternately placed in parallel with each other with an equal interval therebetween.

摘要翻译： MIM型电容元件的放置结构包括一组第一电容元件，其中作为MIM型电容元件的第一电容元件串联放置，以及一组第二电容元件，其中第二电容元件作为MIM型电容元件 串联放置，其中第一电容元件组和第二电容元件组交替地以彼此间隔彼此平行地放置。