Microelectronic assemblies incorporating inductors

    公开(公告)号:US20060113645A1

    公开(公告)日:2006-06-01

    申请号:US11327057

    申请日:2006-01-06

    IPC分类号: H01L23/495

    摘要: Inductors are provided in chip assemblies such as in packaged semiconductor chips. The inductors may be incorporated in a chip carrier which forms part of the package, and may include, for example, spiral or serpentine inductors formed from traces on the chip carrier. The chip carrier may include a flap bearing the inductive element, and this flap may be bent to tilt the inductive element out of the plane of the chip carrier to reduce electromagnetic interaction between the inductive element and surrounding electrical components. Other inductors include solenoids formed in part by leads on the chip carrier as, for example, by displacing leads out of the plane of the chip carrier to form loops in vertically-extensive planes transverse to the plane of the chip carrier. Additional features provide trimming of the inductor to a desired inductance value during by breaking or connecting leads during assembly.

    Microelectronic package comprising offset conductive posts on compliant layer
    4.
    发明授权
    Microelectronic package comprising offset conductive posts on compliant layer 有权
    微电子封装包括柔性层上的偏移导电柱

    公开(公告)号:US08207604B2

    公开(公告)日:2012-06-26

    申请号:US10985126

    申请日:2004-11-10

    IPC分类号: H01L23/485

    摘要: A microelectronic package includes a mounting structure, a microelectronic element associated with the mounting structure, and a plurality of conductive posts physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts project from the mounting structure in an upward direction, at least one of the conductive posts being an offset post. Each offset post has a base connected to the mounting structure, the base of each offset post defining a centroid. Each offset post also defines an upper extremity having a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to the upward direction. The mounting structure is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities may wipe across a contact pad of an opposing circuit board.

    摘要翻译: 微电子封装包括安装结构,与安装结构相关联的微电子元件以及物理连接到安装结构并电连接到微电子元件的多个导电柱。 导电柱从安装结构沿向上的方向突出,至少一个导电柱是偏移柱。 每个偏移柱具有连接到安装结构的基座,每个偏置柱的基部限定质心。 每个偏移柱还限定具有质心的上肢,上肢的质心在垂直于向上方向的水平偏移方向上偏离基部的质心。 安装结构适于允许每个偏移柱绕水平轴线倾斜,使得上端部可以擦过相对电路板的接触垫。

    Multi-sheet conductive substrates for microelectronic devices and methods for forming such substrates
    7.
    发明授权
    Multi-sheet conductive substrates for microelectronic devices and methods for forming such substrates 有权
    用于微电子器件的多片导电衬底以及用于形成这种衬底的方法

    公开(公告)号:US07361979B2

    公开(公告)日:2008-04-22

    申请号:US11025401

    申请日:2004-12-29

    IPC分类号: H01L23/02 H05K1/00

    摘要: A substrate is provided having a plurality of sheets. Each sheet has a first major surface containing a plurality of electrically conductive regions and a second major surface that opposes the first major surface. The sheets are arranged such that the first major surface of a sheet faces the second major surface of another. At least one electrically conductive region of each sheet is partially or fully exposed. At least one electrically conductive region of a sheet is partially or fully covered, e.g., by one or more electrically conductive regions of another sheet. A method for forming such a substrate is also provided.

    摘要翻译: 提供具有多个片材的基片。 每个片材具有包含多个导电区域的第一主表面和与第一主表面相对的第二主表面。 片材布置成使得片材的第一主表面面对另一片材的第二主表面。 每个片材的至少一个导电区域部分或全部暴露。 片材的至少一个导电区域被部分或完全覆盖,例如由另一片材的一个或多个导电区域覆盖。 还提供了一种用于形成这种基板的方法。