公开(公告)号：US09190318B2

公开(公告)日：2015-11-17

申请号：US14059486

申请日：2013-10-22

Applicant: International Business Machines Corporation

Inventor： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC: H01L21/44 ,  H01L21/768 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L23/562 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76871 ,  H01L21/76877 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/481 ,  H01L23/522 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02126 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0348 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05568 ,  H01L2224/0558 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13009 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/11 ,  H01L2224/03

Abstract: A method including forming a first dielectric layer above a conductive pad and above a metallic structure, the conductive pad and the metallic structure are each located within an interconnect level above a substrate, forming a first opening and a second opening in the first dielectric layer, the first opening is aligned with and exposes the conductive pad and the second opening is aligned with and exposes the metallic structure, and forming a metallic liner on the conductive pad, on the metallic structure, and above the first dielectric layer. The method may further include forming a second dielectric layer above the metallic liner, and forming a third dielectric layer above the second dielectric layer, the third dielectric layer is thicker than either the first dielectric layer or the second dielectric layer.

Abstract translation: 一种方法，包括在导电焊盘上方和金属结构之上形成第一电介质层，导电焊盘和金属结构各自位于衬底上方的互连层内，在第一介电层中形成第一开口和第二开口， 所述第一开口与所述导电焊盘对准并且暴露所述导电焊盘，并且所述第二开口与所述金属结构对准并且暴露所述金属结构，并且在所述导电焊盘上，所述金属结构上以及所述第一介电层上方形成金属衬垫。 该方法还可以包括在金属衬垫之上形成第二电介质层，以及在第二电介质层之上形成第三电介质层，第三电介质层比第一电介质层或第二电介质层厚。

公开(公告)号：US09018760B2

公开(公告)日：2015-04-28

申请号：US14083610

申请日：2013-11-19

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Raschid J. Bezama ,  Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  David L. Questad ,  Wolfgang Sauter ,  Timothy D. Sullivan ,  Brian R. Sundlof

IPC: H01L29/41 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L24/13 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/10126 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/119 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13687 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/01024 ,  H01L2924/01026 ,  H01L2924/01032 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A solder interconnect structure is provided with non-wettable sidewalls and methods of manufacturing the same. The method includes forming a nickel or nickel alloy pillar on an underlying surface. The method further includes modifying the sidewall of the nickel or nickel alloy pillar to prevent solder wetting on the sidewall.

Abstract translation: 焊接互连结构设置有不可润湿的侧壁及其制造方法。 该方法包括在下面的表面上形成镍或镍合金支柱。 该方法还包括修改镍或镍合金柱的侧壁以防止焊料在侧壁上润湿。

公开(公告)号：US20140239457A1

公开(公告)日：2014-08-28

申请号：US13780033

申请日：2013-02-28

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Michael J. Hauser ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC: H01L23/34 ,  H01L25/00

CPC classification number: H01L23/34 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06589

Abstract: A three dimensional integrated circuit (3D-IC) structure, method of manufacturing the same and design structure thereof are provided. The 3D-IC structure includes two chips having a dielectric layer, through substrate vias (TSVs) and pads formed on the dielectric layer. The dielectric layer is formed on a bottom surface of each chip. Pads are electrically connected to the corresponding TSVs. The chips are disposed vertically adjacent to each other. The bottom surface of a second chip faces the bottom surface of a first chip. The pads of the first chip are electrically connected to the pads of the second chip through a plurality of conductive bumps. The 3D-IC structure further includes a thermal via structure vertically disposed between the first chip and the second chip and laterally disposed between the corresponding conductive bumps. The thermal via structure has an upper portion and a lower portion.

Abstract translation: 提供三维集成电路（3D-IC）结构，其制造方法及其设计结构。 3D-IC结构包括具有介电层的两个芯片，通过衬底通孔（TSV）和形成在电介质层上的焊盘。 电介质层形成在每个芯片的底表面上。 垫片电连接到相应的TSV。 芯片垂直相邻配置。 第二芯片的底表面面向第一芯片的底表面。 第一芯片的焊盘通过多个导电凸块电连接到第二芯片的焊盘。 3D-IC结构还包括垂直设置在第一芯片和第二芯片之间并横向设置在相应的导电凸块之间的热通孔结构。 热通孔结构具有上部和下部。

公开(公告)号：US20140117535A1

公开(公告)日：2014-05-01

申请号：US13664812

申请日：2012-10-31

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC: H01L23/498 ,  H01L21/50

CPC classification number: H01L23/3114 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/0236 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05575 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2224/06102 ,  H01L2224/11848 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/07025 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/1531 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Structures and methods of making a flip chip package that employ polyimide pads of varying heights at a radial distance from a center of an integrated circuit (IC) chip for a flip chip package. The polyimide pads may be formed under electrical connectors, which connect the IC chip to a chip carrier of the flip chip package, so that electrical connectors formed on polyimide pads of greater height are disposed at a greater radial distance from the center of the IC chip, while electrical connectors formed on polyimide pads of a lesser height are disposed more proximately to the center of the IC chip. Electrical connectors of a greater relative height to the IC chip's surface may compensate for a gap, produced by heat-induced warpage during the making of the flip chip package, that separates the electrical connectors on the IC chip from flip chip attaches on the chip carrier.

Abstract translation: 制造倒装芯片封装的结构和方法，其采用距离用于倒装芯片封装的集成电路（IC）芯片的中心的径向距离的不同高度的聚酰亚胺焊盘。 聚酰亚胺焊盘可以形成在电连接器下面，电连接器将IC芯片连接到倒装芯片封装的芯片载体，使得形成在更高高度的聚酰亚胺焊盘上的电连接器设置在离IC芯片中心更大的径向距离处 而形成在较低高度的聚酰亚胺焊盘上的电连接器更靠近IC芯片的中心设置。 与IC芯片表面相对高的电连接器可以补偿在制造倒装芯片封装期间由热引起的翘曲产生的间隙，其将IC芯片上的电连接器与芯片载体上的倒装芯片分离 。

公开(公告)号：US20140077367A1

公开(公告)日：2014-03-20

申请号：US14083610

申请日：2013-11-19

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Raschid J. Bezama ,  Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  David L. Questad ,  Wolfgang Sauter ,  Timothy D. Sullivan ,  Brian R. Sundlof

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/10126 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/119 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13687 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/01024 ,  H01L2924/01026 ,  H01L2924/01032 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A solder interconnect structure is provided with non-wettable sidewalls and methods of manufacturing the same. The method includes forming a nickel or nickel alloy pillar on an underlying surface. The method further includes modifying the sidewall of the nickel or nickel alloy pillar to prevent solder wetting on the sidewall.

Abstract translation: 焊接互连结构设置有不可润湿的侧壁及其制造方法。 该方法包括在下面的表面上形成镍或镍合金支柱。 该方法还包括修改镍或镍合金柱的侧壁以防止在侧壁上的焊料润湿。

公开(公告)号：US09231046B2

公开(公告)日：2016-01-05

申请号：US13840132

申请日：2013-03-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Zhong-Xiang He ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC: H01L21/02 ,  H01L23/528 ,  H01L23/522 ,  H01L49/02 ,  H01L27/08 ,  H01L23/00

CPC classification number: H01L28/40 ,  H01L23/5223 ,  H01L24/11 ,  H01L24/13 ,  H01L27/0805 ,  H01L28/60 ,  H01L2224/13009 ,  H01L2224/48463 ,  H01L2924/14 ,  H01L2924/19041

Abstract: A metal-insulator-metal (MIM) capacitor using barrier layer metallurgy and methods of manufacture are disclosed. The method includes forming a bottom plate of a metal-insulator-metal (MIM) capacitor and a bonding pad using a single masking process. The method further includes forming a MIM dielectric on the bottom plate. The method further includes forming a top plate of the MIM capacitor on the MIM dielectric. The method further includes forming a solder connection on the bonding pad.

Abstract translation: 公开了一种使用阻挡层冶金和制造方法的金属绝缘体金属（MIM）电容器。 该方法包括使用单一掩蔽工艺形成金属 - 绝缘体 - 金属（MIM）电容器的底板和接合焊盘。 该方法还包括在底板上形成MIM电介质。 该方法还包括在MIM电介质上形成MIM电容器的顶板。 该方法还包括在焊盘上形成焊接连接​​。

公开(公告)号：US09165850B2

公开(公告)日：2015-10-20

申请号：US14525682

申请日：2014-10-28

Applicant: International Business Machines Corporation

Inventor： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/525

CPC classification number: H01L23/3114 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/0236 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05575 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2224/06102 ,  H01L2224/11848 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/07025 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/1531 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Structures and methods of making a flip chip package that employ polyimide pads of varying heights at a radial distance from a center of an integrated circuit (IC) chip for a flip chip package. The polyimide pads may be formed under electrical connectors, which connect the IC chip to a chip carrier of the flip chip package, so that electrical connectors formed on polyimide pads of greater height are disposed at a greater radial distance from the center of the IC chip, while electrical connectors formed on polyimide pads of a lesser height are disposed more proximately to the center of the IC chip. Electrical connectors of a greater relative height to the IC chip's surface may compensate for a gap, produced by heat-induced warpage during the making of the flip chip package, that separates the electrical connectors on the IC chip from flip chip attaches on the chip carrier.

Abstract translation: 制造倒装芯片封装的结构和方法，其采用距离用于倒装芯片封装的集成电路（IC）芯片的中心的径向距离的不同高度的聚酰亚胺焊盘。 聚酰亚胺焊盘可以形成在电连接器下面，电连接器将IC芯片连接到倒装芯片封装的芯片载体，使得形成在更高高度的聚酰亚胺焊盘上的电连接器设置在离IC芯片中心更大的径向距离处 而形成在较低高度的聚酰亚胺焊盘上的电连接器更靠近IC芯片的中心设置。 与IC芯片表面相对高的电连接器可以补偿在制造倒装芯片封装期间由热引起的翘曲产生的间隙，其将IC芯片上的电连接器与芯片载体上的倒装芯片分离 。

公开(公告)号：US20150097283A1

公开(公告)日：2015-04-09

申请号：US14048483

申请日：2013-10-08

Applicant: International Business Machines Corporation

Inventor： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L21/7684 ,  H01L21/76877 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/03009 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/03602 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05007 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05096 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/0558 ,  H01L2224/05655 ,  H01L2224/11 ,  H01L2224/11009 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/94 ,  H01L2924/14 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2924/014

Abstract: Solder bump connections and methods for fabricating solder bump connections. A passivation layer is formed on a dielectric layer. Via openings extend through the passivation layer from a top surface of the passivation layer to a metal line in the passivation layer. A conductive layer is formed on the top surface of the passivation layer and within each via opening. When the passivation layer and the conductive layer are planarized, a plug is formed that includes sections in the via openings. Each section is coupled with the metal line.

Abstract translation: 焊接凸块连接和制造焊料凸点连接的方法。 在电介质层上形成钝化层。 通孔从钝化层的顶表面延伸穿过钝化层到钝化层中的金属线。 导电层形成在钝化层的顶表面上并在每个通孔开口内。 当钝化层和导电层平坦化时，形成包括通孔开口中的部分的插塞。 每个部分与金属线连接。

公开(公告)号：US20140319522A1

公开(公告)日：2014-10-30

申请号：US13870026

申请日：2013-04-25

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Karen P. McLaughlin ,  Ekta Misra ,  Christopher D. Muzzy ,  Eric D. Perfecto ,  Wolfgang Sauter

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L22/34 ,  H01L23/3192 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/03462 ,  H01L2224/03622 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05558 ,  H01L2224/05568 ,  H01L2224/05583 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/11462 ,  H01L2224/11622 ,  H01L2224/11849 ,  H01L2224/11914 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13147 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2224/05552

Abstract: Disclosed are a method for metallization during semiconductor wafer processing and the resulting structures. In this method, a passivation layer is patterned with first openings aligned above and extending vertically to metal structures below. A mask layer is formed and patterned with second openings aligned above the first openings, thereby forming two-tier openings extending vertically through the mask layer and passivation layer to the metal structures below. An electrodeposition process forms, in the two-tier openings, both under-bump pad(s) and additional metal feature(s), which are different from the under-bump pad(s) (e.g., a wirebond pad; a final vertical section of a crackstop structure; and/or a probe pad). Each under-bump pad and additional metal feature initially comprises copper with metal cap layers thereon. The mask layer is removed, an additional mask layer is formed and patterned with third opening(s) exposing only the under-bump pad(s) and solder material is deposited on the under-bump pad(s).

Abstract translation: 公开了半导体晶片处理期间的金属化方法和所得到的结构。 在该方法中，钝化层被图案化，其中第一开口在上方对齐并垂直延伸到下面的金属结构。 形成掩模层并用第一开口对准的第二开口进行图案化，从而形成垂直延伸穿过掩模层和钝化层到下面的金属结构的两层开口。 电沉积工艺在双层开口中形成凸点下焊盘和附加的金属部件，其不同于凸块下焊盘（例如，引线焊盘;最终垂直的） 裂缝结构部分和/或探针垫）。 每个凸点下焊盘和附加的金属特征最初包括铜上的金属盖层。 除去掩模层，形成另外的掩模层并用仅暴露凸块下焊盘的第三开口图案化，并且将焊料材料沉积在凸块下焊盘上。

公开(公告)号：US20140187034A1

公开(公告)日：2014-07-03

申请号：US14200613

申请日：2014-03-07

Applicant: International Business Machines Corporation

Inventor： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/11902 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/13076 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/13618 ,  H01L2224/1362 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/1601 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2224/13099 ,  H01L2924/00012

Abstract: Disclosed is a chip and method of forming the chip with improved conductive pads that allow for flexible C4 connections with a chip carrier or with another integrated circuit chip. The pads have a three-dimensional geometric shape (e.g., a pyramid or cone shape) with a base adjacent to the surface of the chip, a vertex opposite the base and, optionally, mushroom-shaped cap atop the vertex. Each pad can include a single layer of conductive material or multiple layers of conductive material (e.g., a wetting layer stacked above a non-wetting layer). The pads can be left exposed to allow for subsequent connection to corresponding solder bumps on a chip carrier or a second chip. Alternatively, solder balls can be positioned on the conductive pads to allow for subsequent connection to corresponding solder-paste filled openings on a chip carrier or a second chip.

Abstract translation: 公开了一种用改进的导电焊盘形成芯片的芯片和方法，其允许与芯片载体或另一个集成电路芯片的柔性C4连接。 垫具有三维几何形状（例如，金字塔或锥形），其具有与芯片表面相邻的基部，与基部相对的顶点以及可选地在顶点顶部的蘑菇形帽。 每个焊盘可以包括单层导电材料或多层导电材料（例如，堆叠在非润湿层上方的润湿层）。 焊盘可以被暴露以允许随后连接到芯片载体或第二芯片上的相应焊料凸块。 或者，焊球可以定位在导电焊盘上，以允许随后连接到芯片载体或第二芯片上相应的焊膏填充的开口。