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公开(公告)号：US20230178653A1
公开(公告)日：2023-06-08
申请号：US17542377
申请日：2021-12-04
发明人： SHOGO MOCHIZUKI , Nicolas Loubet
IPC分类号： H01L29/786 , H01L29/06 , H01L29/66 , H01L29/78
CPC分类号： H01L29/78618 , H01L29/0653 , H01L29/66545 , H01L29/66553 , H01L29/66742 , H01L29/78696 , H01L29/7848 , H01L29/42392
摘要： A GAA (gate-all-around) semiconductor device includes a first source/drain region comprising an epitaxially grown first buffer layer disposed in contact with first device channel inner spacers and a device substrate, and an epitaxially grown first source/drain disposed adjacent to the first buffer layer. The device also includes a second source/drain region comprising an epitaxially grown second buffer layer disposed in contact with second device channel inner spacers and the device substrate, and an epitaxially grown second source/drain disposed adjacent to the second buffer layer. The first source/drain region and the second source/drain region are disposed on opposing sides of a device gate structure. The device gate structure comprising semiconductor nanosheet channels disposed between the first source/drain region and the second source/drain region.
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公开(公告)号：US20230178624A1
公开(公告)日：2023-06-08
申请号：US17643014
申请日：2021-12-07
发明人： GEN TSUTSUI , SHOGO MOCHIZUKI
IPC分类号： H01L29/423 , H01L29/06 , H01L29/786 , H01L27/092 , H01L21/8238
CPC分类号： H01L29/42392 , H01L21/823807 , H01L27/092 , H01L29/0665 , H01L29/78696
摘要： Embodiments are disclosed for a system. The system includes a semiconductor structure. The semiconductor structure includes a stacked field effect transistor (stacked-FET). The stacked-FET includes a top FET having multiple top channels having multiple nano-sheets in contact with corresponding nano-sheets in a corresponding top channels for an active gate. The stacked-FET includes multiple bottom channels having a dielectric material. The semiconductor structure also includes an active gate. The active gate includes the corresponding top channels and corresponding bottom channels having the dielectric material.
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公开(公告)号：US20160111553A1
公开(公告)日：2016-04-21
申请号：US14974763
申请日：2015-12-18
IPC分类号： H01L29/786 , H01L29/417 , H01L29/06 , H01L29/423
CPC分类号： H01L29/78696 , H01L21/30604 , H01L21/3247 , H01L21/823425 , H01L21/823431 , H01L29/0673 , H01L29/0676 , H01L29/1037 , H01L29/41733 , H01L29/41791 , H01L29/42384 , H01L29/42392 , H01L29/66795 , H01L29/66818 , H01L29/7831 , H01L29/785 , H01L29/7854 , H01L29/7856
摘要： Transistors including one or more semiconductor fins formed on a substrate. The one or more semiconductor fins are thinner in a channel region than in source and drain regions and have rounded corners formed by an anneal in a gaseous environment. A gate dielectric layer is on the channel region of the one or more semiconductor fins, conforming to the contours of the one or more semiconductor fins. A gate structure is on the gate dielectric layer.
摘要翻译： 晶体管包括形成在基板上的一个或多个半导体鳍片。 一个或多个半导体鳍片在沟道区域比在源极和漏极区域更薄，并且具有通过在气体环境中的退火形成的圆角。 栅介质层位于一个或多个半导体鳍片的沟道区上，符合一个或多个半导体鳍片的轮廓。 栅极结构在栅极电介质层上。
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4.发明申请公开(公告)号：US20150318211A1
公开(公告)日：2015-11-05
申请号：US14610653
申请日：2015-01-30
发明人： DECHAO GUO , SHOGO MOCHIZUKI , ANDREAS SCHOLZE , CHUN-CHEN YEH
IPC分类号： H01L21/8234 , H01L29/78 , H01L29/08 , H01L29/66
CPC分类号： H01L29/0847 , H01L21/2252 , H01L21/324 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L27/0886 , H01L29/08 , H01L29/0843 , H01L29/086 , H01L29/0869 , H01L29/0878 , H01L29/0886 , H01L29/165 , H01L29/267 , H01L29/66 , H01L29/66545 , H01L29/66636 , H01L29/66681 , H01L29/66795 , H01L29/7816 , H01L29/7833 , H01L29/7848 , H01L29/7851
摘要： A semiconductor device including a gate structure on a channel region portion of a fin structure, and at least one of an epitaxial source region and an epitaxial drain region on a source region portion and a drain region portion of the fin structure. At least one of the epitaxial source region portion and the epitaxial drain region portion include a first concentration doped portion adjacent to the fin structure, and a second concentration doped portion on the first concentration doped portion. The second concentration portion has a greater dopant concentration than the first concentration doped portion. An extension dopant region extending into the channel portion of the fin structure having an abrupt dopant concentration gradient of n-type or p-type dopants of 7 nm per decade or greater.
摘要翻译： 一种半导体器件，其包括鳍结构的沟道区域上的栅极结构，以及鳍状结构的源极区域和漏极区域上的外延源区域和外延漏极区域中的至少一个。 外延源区域部分和外延漏极区域部分中的至少一个包括与鳍状结构相邻的第一浓度掺杂部分和第一浓度掺杂部分上的第二浓度掺杂部分。 第二浓度部分具有比第一浓度掺杂部分更大的掺杂剂浓度。 扩展掺杂剂区域延伸到鳍结构的沟道部分，其具有每十年或更长时间为7nm的n型或p型掺杂剂的突变掺杂剂浓度梯度。
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公开(公告)号：US20190189774A1
公开(公告)日：2019-06-20
申请号：US16280100
申请日：2019-02-20
IPC分类号： H01L29/66 , H01L21/8238 , H01L21/02 , H01L27/092 , H01L29/786 , H01L29/423 , H01L29/06
CPC分类号： H01L29/66553 , H01L21/0214 , H01L21/02164 , H01L21/02175 , H01L21/02255 , H01L21/02321 , H01L21/02332 , H01L21/0234 , H01L21/02532 , H01L21/823814 , H01L21/823864 , H01L21/823885 , H01L27/092 , H01L29/0653 , H01L29/42392 , H01L29/66666 , H01L29/7827 , H01L29/78618 , H01L29/78642
摘要： A method of fabricating a semiconductor device includes forming a fin on a substrate. Source/drain regions are arranged on the substrate on opposing sides of the fin. The method includes depositing a semiconductor layer on the source/drain regions. The method includes depositing a germanium containing layer on the fin and the semiconductor layer. The method further includes applying an anneal operation configured to chemically react the semiconductor layer with the germanium containing layer and form a silicon oxide layer.
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公开(公告)号：US20180047828A1
公开(公告)日：2018-02-15
申请号：US15235829
申请日：2016-08-12
IPC分类号： H01L29/66 , H01L21/311
CPC分类号： H01L29/66666 , H01L21/31111 , H01L29/0847 , H01L29/6653 , H01L29/6656 , H01L29/66795
摘要： A method of forming a spacer for a vertical transistor is provided. The method includes forming a fin structure on a substrate, depositing a first spacer on exposed surfaces of the substrate to define gaps between the first spacer and the fin structure and depositing a second spacer on the exposed surfaces of the substrate in at least the gaps.
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7.发明申请公开(公告)号：US20170294510A1
公开(公告)日：2017-10-12
申请号：US15634411
申请日：2017-06-27
发明人： DECHAO GUO , SHOGO MOCHIZUKI , ANDREAS SCHOLZE , CHUN-CHEN YEH
IPC分类号： H01L29/08 , H01L29/78 , H01L21/324 , H01L29/66 , H01L21/225
CPC分类号： H01L29/0847 , H01L21/2252 , H01L21/324 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L27/0886 , H01L29/08 , H01L29/0843 , H01L29/086 , H01L29/0869 , H01L29/0878 , H01L29/0886 , H01L29/165 , H01L29/267 , H01L29/66 , H01L29/66545 , H01L29/66636 , H01L29/66681 , H01L29/66795 , H01L29/7816 , H01L29/7833 , H01L29/7848 , H01L29/7851
摘要： A semiconductor device including a gate structure on a channel region portion of a fin structure, and at least one of an epitaxial source region and an epitaxial drain region on a source region portion and a drain region portion of the fin structure. At least one of the epitaxial source region portion and the epitaxial drain region portion include a first concentration doped portion adjacent to the fin structure, and a second concentration doped portion on the first concentration doped portion. The second concentration portion has a greater dopant concentration than the first concentration doped portion. An extension dopant region extending into the channel portion of the fin structure having an abrupt dopant concentration gradient of n-type or p-type dopants of 7 nm per decade or greater.
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8.发明申请公开(公告)号：US20160276463A1
公开(公告)日：2016-09-22
申请号：US15170273
申请日：2016-06-01
发明人： DECHAO GUO , SHOGO MOCHIZUKI , ANDREAS SCHOLZE , CHUN-CHEN YEH
IPC分类号： H01L29/66 , H01L21/225 , H01L21/324 , H01L29/08
CPC分类号： H01L29/0847 , H01L21/2252 , H01L21/324 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L27/0886 , H01L29/08 , H01L29/0843 , H01L29/086 , H01L29/0869 , H01L29/0878 , H01L29/0886 , H01L29/165 , H01L29/267 , H01L29/66 , H01L29/66545 , H01L29/66636 , H01L29/66681 , H01L29/66795 , H01L29/7816 , H01L29/7833 , H01L29/7848 , H01L29/7851
摘要： A semiconductor device including a gate structure on a channel region portion of a fin structure, and at least one of an epitaxial source region and an epitaxial drain region on a source region portion and a drain region portion of the fin structure. At least one of the epitaxial source region portion and the epitaxial drain region portion include a first concentration doped portion adjacent to the fin structure, and a second concentration doped portion on the first concentration doped portion. The second concentration portion has a greater dopant concentration than the first concentration doped portion. An extension dopant region extending into the channel portion of the fin structure having an abrupt dopant concentration gradient of n-type or p-type dopants of 7 nm per decade or greater.
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公开(公告)号：US20230178623A1
公开(公告)日：2023-06-08
申请号：US17545574
申请日：2021-12-08
发明人： Tao Li , Ardasheir Rahman , Tsung-Sheng Kang , SHOGO MOCHIZUKI
IPC分类号： H01L29/423 , H01L29/06 , H01L29/786 , H01L29/66 , H01L29/417
CPC分类号： H01L29/42392 , H01L29/0665 , H01L29/78618 , H01L29/78696 , H01L29/66742 , H01L29/41733
摘要： A semiconductor channel material structure is provided that has an improved, i.e., increased, effective channel area. The semiconductor channel material structure includes a plurality of semiconductor channel material nanosheets stacked one atop the other. The increased channel area is afforded by providing at least one through-stack semiconductor channel material that extends through at least one of the semiconductor channel material nanosheets.
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公开(公告)号：US20230086888A1
公开(公告)日：2023-03-23
申请号：US17482573
申请日：2021-09-23
发明人： Kangguo Cheng , SHOGO MOCHIZUKI , JUNTAO LI
IPC分类号： H01L21/8238 , H01L27/092 , H01L21/84 , H01L27/12
摘要： A dielectric layer is on top of a first semiconductor stack. The first semiconductor stack is compressively strained. A second semiconductor stack is on top of the dielectric layer. The second semiconductor stack is tensely strained.
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