公开(公告)号：US20240096970A1

公开(公告)日：2024-03-21

申请号：US18497137

申请日：2023-10-30

申请人： Silanna UV Technologies Pte Ltd

发明人： Petar Atanackovic

IPC分类号： H01L29/24 ,  C30B29/32 ,  H01L21/02 ,  H01L21/225 ,  H01L31/032 ,  H01L33/00 ,  H01L33/26

CPC分类号： H01L29/24 ,  C30B29/32 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02631 ,  H01L21/2252 ,  H01L31/032 ,  H01L33/0029 ,  H01L33/26

摘要： Various forms of MgxGe1-xO2-x are disclosed, where the MgxGe1-xO2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of MgxGe1-xO2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1-xO2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices. Also disclosed is single crystal MgxGe1-xO2-x, with x having a value of 0≤x

公开(公告)号：US11855152B2

公开(公告)日：2023-12-26

申请号：US17651711

申请日：2022-02-18

申请人： Silanna UV Technologies Pte Ltd

发明人： Petar Atanackovic

IPC分类号： H01L33/26 ,  H01L29/24 ,  H01L31/032 ,  H01L21/02 ,  C30B29/32 ,  H01L21/225 ,  H01L33/00

CPC分类号： H01L29/24 ,  C30B29/32 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02631 ,  H01L21/2252 ,  H01L31/032 ,  H01L33/0029 ,  H01L33/26

摘要： Various forms of MgxGe1-xO2-x are disclosed, where the MgxGe1-xO2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of MgxGe1-xO2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1-xO2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices.

公开(公告)号：US11764310B2

公开(公告)日：2023-09-19

申请号：US17687869

申请日：2022-03-07

申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES

发明人： Huilong Zhu

IPC分类号： H01L29/788 ,  H01L29/792 ,  H01L21/28 ,  H01L29/78 ,  H01L21/02 ,  H01L21/225 ,  H01L21/3065 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

CPC分类号： H01L29/7889 ,  H01L21/02636 ,  H01L21/2252 ,  H01L21/3065 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/6684 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/78391 ,  H01L29/7926

摘要： A vertical storage device, a method of manufacturing the same, and an electronic apparatus including the storage device are provided. The storage device includes: a first source/drain layer located at a first height with respect to a substrate and a second source/drain layer located at a second height different from the first height; a channel layer connecting the first source/drain layer and the second source/drain layer; and a gate stack including a storage function layer, the storage function layer extending on a sidewall of the channel layer and extending in-plane from the sidewall of the channel layer onto a sidewall of the first source/drain layer and a sidewall of the second source/drain layer.

公开(公告)号：US20230146938A1

公开(公告)日：2023-05-11

申请号：US17651711

申请日：2022-02-18

申请人： Silanna UV Technologies Pte Ltd

发明人： Petar Atanackovic

IPC分类号： H01L33/00 ,  H01L21/225 ,  C30B29/32

CPC分类号： H01L33/0029 ,  H01L21/2252 ,  C30B29/32

摘要： Various forms of MgxGe1-xO2-x are disclosed, where the MgxGe1-xO2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of MgxGe1-xO2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1-xO2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices.

公开(公告)号：US20180269061A1

公开(公告)日：2018-09-20

申请号：US15976793

申请日：2018-05-10

申请人： Lam Research Corporation

发明人： Reza Arghavani ,  Samantha Tan ,  Bhadri N. Varadarajan ,  Adrien LaVoie ,  Ananda K. Banerji ,  Jun Qian ,  Shankar Swaminathan

IPC分类号： H01L21/223 ,  C23C16/52 ,  H01L21/67 ,  C23C16/455 ,  H01L21/22 ,  H01L21/225 ,  C23C16/04 ,  H01L29/66 ,  C23C16/50

CPC分类号： H01L21/223 ,  C23C16/045 ,  C23C16/45529 ,  C23C16/45544 ,  C23C16/50 ,  C23C16/52 ,  H01L21/2225 ,  H01L21/2252 ,  H01L21/67155 ,  H01L21/67207 ,  H01L29/66803

摘要： Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon nitride material, a silicon carbonitride material, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor. Also disclosed herein are multi-station substrate processing apparatuses for doping the fin-shaped channel regions of partially fabricated 3-D transistors.

公开(公告)号：US20180226471A1

公开(公告)日：2018-08-09

申请号：US15885340

申请日：2018-01-31

申请人： Infineon Technologies AG

发明人： Frank Hille ,  Andre Brockmeier ,  Francisco Javier Santos Rodriguez ,  Daniel Schloegl ,  Hans-Joachim Schulze

IPC分类号： H01L29/06 ,  H01L21/02 ,  H01L21/225 ,  H01L21/78 ,  H01L21/306

CPC分类号： H01L29/0638 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02634 ,  H01L21/02658 ,  H01L21/2252 ,  H01L21/30608 ,  H01L21/78 ,  H01L21/7806 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/66333 ,  H01L29/66363 ,  H01L29/7395 ,  H01L29/74 ,  H01L29/7802 ,  H01L29/861

摘要： Epitaxy troughs are formed in a semiconductor substrate, wherein a matrix section of the semiconductor substrate laterally separates the epitaxy troughs and comprises a first semiconductor material. Crystalline epitaxy regions of a second semiconductor material are formed in the epitaxy troughs, wherein the second semiconductor material differs from the first semiconductor material in at least one of porosity, impurity content or defect density. From the epitaxy regions at least main body portions of semiconductor bodies of the semiconductor devices are formed.

公开(公告)号：US20180182627A1

公开(公告)日：2018-06-28

申请号：US15899969

申请日：2018-02-20

申请人： Varian Semiconductor Equipment Associates, Inc.

发明人： Thomas R. Omstead

IPC分类号： H01L21/225 ,  H01L29/66 ,  C23C16/455 ,  H01L21/311 ,  H01L21/324 ,  H01L21/02 ,  H01J37/32 ,  C23C16/52 ,  C23C16/50 ,  C23C16/48 ,  H01L21/22

CPC分类号： H01L21/2253 ,  C23C16/45536 ,  C23C16/45551 ,  C23C16/486 ,  C23C16/50 ,  C23C16/52 ,  H01J37/32357 ,  H01L21/02057 ,  H01L21/02112 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/0226 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02636 ,  H01L21/2225 ,  H01L21/225 ,  H01L21/2252 ,  H01L21/31116 ,  H01L21/324 ,  H01L29/66803

摘要： In one embodiment, a processing apparatus may include a plasma chamber configured to generate a plasma; a process chamber adjacent the plasma chamber and configured to house a substrate that defines a substrate plane; an extraction system adjacent the plasma chamber and configured to direct an ion beam from the plasma to the substrate, the ion beam forming a non-zero angle with respect to a perpendicular to the substrate plane; and a molecular chamber adjacent the process chamber, isolated from the plasma chamber and configured to deliver a molecular beam to the substrate, wherein the ion beam and molecular beam are alternately delivered to the substrate to form a monolayer comprising species from the ion beam and molecular beam.

公开(公告)号：US09954109B2

公开(公告)日：2018-04-24

申请号：US15147342

申请日：2016-05-05

申请人： International Business Machines Corporation

发明人： Kangguo Cheng ,  Ramachandra Divakaruni

IPC分类号： H01L21/225 ,  H01L21/324 ,  H01L29/66 ,  H01L29/786 ,  H01L29/423 ,  H01L29/51

CPC分类号： H01L29/78621 ,  H01L21/2252 ,  H01L21/324 ,  H01L29/42392 ,  H01L29/517 ,  H01L29/66492 ,  H01L29/66666 ,  H01L29/78642

摘要： A vertical transistor includes a gate structure interposed between a proximate spacer doped with a first dopant-type and a distal spacer doped with the first dopant-type. The proximate spacer is formed on an upper surface of a semiconductor substrate. At least one channel region extends vertically from the proximate doping source layer to the distal doping source layer. A proximate S/D extension region is adjacent the proximate spacer and a distal S/D extension region is adjacent the distal spacer. The proximate and distal S/D extension regions include dopants that match the first dopant-type of the proximate and distal doping sources.

公开(公告)号：US20170133285A1

公开(公告)日：2017-05-11

申请号：US15342242

申请日：2016-11-03

申请人： Tokyo Electron Limited

发明人： Yuichi Takenaga ,  Daisuke Suzuki ,  Katsuhiko Komori

IPC分类号： H01L21/66 ,  H01L21/324 ,  H01L21/67 ,  H01L21/3215

CPC分类号： H01L22/26 ,  H01L21/2252 ,  H01L21/32155 ,  H01L21/324 ,  H01L21/67109 ,  H01L21/67253 ,  H01L22/10 ,  H01L22/20

摘要： A heat treatment system includes a heat treatment condition storing unit that stores a heat treatment condition with respect to a doping processing and a diffusion processing; a model storing unit that stores a model representing a relationship between a change of the heat treatment condition and a change of an impurity concentration in an impurity-doped thin film; a heat treatment unit that forms the impurity-doped thin film under the heat treatment condition; a calculating unit that calculates a heat treatment condition of the doping processing and the diffusion processing that causes the impurity concentration in the impurity-doped film to be included within the predetermined range, based on the impurity concentration in the impurity-doped thin film and the model; and an adjusting unit that adjusts the impurity concentration in the impurity-doped thin film to be included within the predetermined range.

公开(公告)号：US20170117395A1

公开(公告)日：2017-04-27

申请号：US15295109

申请日：2016-10-17

申请人： Infineon Technologies AG

发明人： Thomas WUEBBEN ,  Peter IRSIGLER ,  Hans-Joachim SCHULZE

IPC分类号： H01L29/739 ,  H01L29/06 ,  H01L21/265 ,  H01L29/36 ,  H01L29/66

CPC分类号： H01L29/7397 ,  H01L21/2236 ,  H01L21/2252 ,  H01L21/2253 ,  H01L21/265 ,  H01L21/26586 ,  H01L21/266 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/36 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7813

摘要： A method of processing a semiconductor device, comprising: providing a semiconductor body having dopants of a first conductivity type; forming at least one trench that extends into the semiconductor body along a vertical direction, the trench being laterally confined by two trench sidewalls and vertically confined by a trench bottom; applying a substance onto at least a section of a trench surface formed by one of the trench sidewalls and/or the trench bottom of the at least one trench, such that applying the substance includes preventing that the substance is applied to the other of the trench sidewalls; and diffusing of the applied substance from the section into the semiconductor body, thereby creating, in the semiconductor body, a semiconductor region having dopants of a second conductivity type and being arranged adjacent to the section.