- 专利标题： FORMATION OF SELF-ALIGNED BOTTOM SPACER FOR VERTICAL TRANSISTORS
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申请号： US16280100申请日： 2019-02-20
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公开(公告)号： US20190189774A1公开(公告)日： 2019-06-20
- 发明人: RUQIANG BAO , HEMANTH JAGANNATHAN , CHOONGHYUN LEE , SHOGO MOCHIZUKI
- 申请人： International Business Machines Corporation
- 主分类号： H01L29/66
- IPC分类号： H01L29/66 ; H01L21/8238 ; H01L21/02 ; H01L27/092 ; H01L29/786 ; H01L29/423 ; H01L29/06
摘要：
A method of fabricating a semiconductor device includes forming a fin on a substrate. Source/drain regions are arranged on the substrate on opposing sides of the fin. The method includes depositing a semiconductor layer on the source/drain regions. The method includes depositing a germanium containing layer on the fin and the semiconductor layer. The method further includes applying an anneal operation configured to chemically react the semiconductor layer with the germanium containing layer and form a silicon oxide layer.
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