公开(公告)号：US10950448B2

公开(公告)日：2021-03-16

申请号：US16375941

申请日：2019-04-05

Applicant: APPLIED MATERIALS, INC.

Inventor： Bencherki Mebarki ,  Joung Joo Lee ,  Xianmin Tang

IPC: H01L21/285 ,  H01L21/67

Abstract: Methods and apparatus for control of the quality of films deposited via physical vapor deposition are provided herein. In some embodiments, a method of depositing a film using linear scan physical vapor deposition includes: determining a deposition rate of a material to be deposited on a substrate in a linear scan physical vapor deposition process; calculating a scan rate of the substrate to achieve deposition of the material to a desired thickness in a single pass when deposited at the deposition rate; and performing the linear scan physical vapor deposition process while moving the substrate at the calculated scan rate.

公开(公告)号：US10916433B2

公开(公告)日：2021-02-09

申请号：US16366539

申请日：2019-03-27

Applicant: Applied Materials, Inc.

Inventor： He Ren ,  Maximillian Clemons ,  Mei-Yee Shek ,  Minrui Yu ,  Bencherki Mebarki ,  Mehul B. Naik ,  Chentsau Ying ,  Srinivas D. Nemani

IPC: H01L21/285 ,  H01L21/32 ,  H01L21/768 ,  C23C14/04 ,  C23C14/06 ,  C23C14/35 ,  C23C14/22 ,  C23C14/58 ,  H01L29/45 ,  H01L21/3205 ,  H01L23/532

Abstract: Methods for forming low resistivity metal silicide interconnects using one or a combination of a physical vapor deposition (PVD) process and an anneal process are described herein. In one embodiment, a method of forming a plurality of wire interconnects includes flowing a sputtering gas into a processing volume of a processing chamber, applying a power to a target disposed in the processing volume, forming a plasma in a region proximate to the sputtering surface of the target, and depositing the metal and silicon layer on the surface of the substrate. Herein, the first target comprises a metal silicon alloy and a sputtering surface thereof is angled with respect to a surface of the substrate at between about 10° and about 50°.

公开(公告)号：US20190276931A1

公开(公告)日：2019-09-12

申请号：US16296718

申请日：2019-03-08

Applicant: APPLIED MATERIALS, INC.

Inventor： Bencherki Mebarki ,  Anantha K. Subramani ,  Joung Joo Lee ,  Farzad Houshmand ,  Kelvin Chan ,  Kenneth Starks ,  Xianmin Tang

IPC: C23C14/54 ,  H01L21/02 ,  H01L21/285 ,  C23C14/50 ,  C23C14/34

Abstract: Methods and apparatus for physical vapor deposition are provided herein. In some embodiments, an apparatus for physical vapor deposition (PVD) includes: a linear PVD source to provide a stream of material flux comprising material to be deposited on a substrate; and a substrate support having a support surface to support the substrate at a non-perpendicular angle to the linear PVD source, wherein the substrate support and linear PVD source are movable with respect to each other along an axis that is perpendicular to a plane of the support surface of the substrate support sufficiently to cause the stream of material flux to move over a working surface of the substrate disposed on the substrate support during operation.

公开(公告)号：US10354882B2

公开(公告)日：2019-07-16

申请号：US15963451

申请日：2018-04-26

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Xianmin Tang ,  Sundar Ramamurthy ,  Jerome Machillot

IPC: H01L21/285 ,  H01L21/324

Abstract: Methods for forming a metal silicide film with low resistivity at low temperature are described. A metal silicide film is formed on a substrate surface and annealed at high pressure and low temperature.

公开(公告)号：US20180315609A1

公开(公告)日：2018-11-01

申请号：US15963451

申请日：2018-04-26

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Xianmin Tang ,  Sundar Ramamurthy ,  Jerome Machillot

IPC: H01L21/285 ,  H01L21/324

CPC classification number: H01L21/28518 ,  H01L21/2855 ,  H01L21/324

Abstract: Methods for forming a metal silicide film with low resistivity at low temperature are described. A metal silicide film is formed on a substrate surface and annealed at high pressure and low temperature.

公开(公告)号：US20170309515A1

公开(公告)日：2017-10-26

申请号：US15137245

申请日：2016-04-25

Applicant: APPLIED MATERIALS, INC.

Inventor： He Ren ,  Jie Zhou ,  Guannan Chen ,  Michael W. Stowell ,  Bencherki Mebarki ,  Mehul Naik ,  Srinivas D. Nemani ,  Nikolaos Bekiaris ,  Zhiyuan Wu

IPC: H01L21/768

CPC classification number: H01L21/76883 ,  H01L21/28556 ,  H01L21/76877 ,  H01L23/53209

Abstract: An integrated circuit is fabricated by chemical vapor deposition or atomic layer deposition of a metal film to metal film.

公开(公告)号：US20250051902A1

公开(公告)日：2025-02-13

申请号：US18232631

申请日：2023-08-10

Applicant: Applied Materials, Inc.

Inventor： Chandan Das ,  Bencherki Mebarki ,  Jiecong Tang ,  Mohammed Mahdi Tavakoli ,  John Sudijono ,  Joung Joo Lee

IPC: C23C12/00 ,  C23C16/40 ,  C23C16/455 ,  C23C16/56

Abstract: Transition metal dichalcogenide (TMDC) films and methods for conformally depositing TMDC films on a substrate surface are described. The substrate surface may have one or more features formed therein, one or more layers formed thereon, and combinations thereof. The substrate surface is exposed to a transition metal precursor and an oxidant to form a transition metal oxide film in a first phase. The transition metal oxide film is exposed to a chalcogenide precursor to convert the transition metal oxide film to the TMDC film in a second phase.

公开(公告)号：US20250022750A1

公开(公告)日：2025-01-16

申请号：US18753020

申请日：2024-06-25

Applicant: Applied Materials, Inc.

Inventor： Shinjae Hwang ,  Yoon Ah Shin ,  Feng Chen ,  Bencherki Mebarki ,  Joung Joo Lee ,  Xianmin Tang

IPC: H01L21/768

Abstract: Embodiments of the disclosure provide methods of forming interconnect structures in the manufacture of microelectronic devices. In one or more embodiments, microelectronic devices described herein comprise at least one top interconnect structure that is interconnected to at least one bottom interconnect structure. Embodiments of the disclosure relate to methods of improving barrier layer and metal liner properties in the interconnect structures without increasing capacitance and/or damaging other layers. In some embodiments, the barrier layer is treated with microwave radiation. The treatment process can be implemented in a processing tool including a modular high-frequency emission source.

公开(公告)号：US20240038859A1

公开(公告)日：2024-02-01

申请号：US18379600

申请日：2023-10-12

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Joung Joo Lee ,  Wenting Hou ,  Takashi Kuratomi ,  Avgerinos V. Gelatos ,  Jianxin Lei ,  Liqi Wu ,  Raymond Hoiman Hung ,  Tae Hong Ha ,  Xianmin Tang

IPC: H01L29/417 ,  H01L21/8234 ,  H01L21/285

CPC classification number: H01L29/41791 ,  H01L21/823418 ,  H01L21/28518

Abstract: A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a substrate; in the absence of an air break after the depositing of the metal silicide layer, preparing a metal cap layer directly on the metal silicide layer; and depositing a conductor on the metal cap layer.

公开(公告)号：US20210391176A1

公开(公告)日：2021-12-16

申请号：US16902918

申请日：2020-06-16

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Komal S. Garde ,  Kishor Kalathiparambil ,  Joung Joo Lee ,  Xianmin Tang

IPC: H01L21/285 ,  H01L21/3213 ,  H01J37/34 ,  C23C14/35 ,  C23C14/18

Abstract: Embodiments of the disclosure relate to methods for enlarging the opening width of substrate features by reducing the overhang of deposited films. Some embodiments of the disclosure utilize a highly energetic bias pulse to etch the deposited film near the opening of the substrate feature. Some embodiments of the disclosure etch the deposited film without damaging the underlying substrate.