公开(公告)号：US20240071927A1

公开(公告)日：2024-02-29

申请号：US18236562

申请日：2023-08-22

Applicant: Applied Materials, Inc.

Inventor： Shinjae Hwang ,  Feng Chen ,  Muthukumar Kaliappan ,  Michael Haverty

IPC: H01L23/532 ,  C23C16/455 ,  H01L21/768

CPC classification number: H01L23/53209 ,  C23C16/45525 ,  H01L21/76879 ,  H01L2224/27452 ,  H01L2224/29398

Abstract: Methods of forming interconnects and electronic devices are described. Methods of forming interconnects include forming a tantalum nitride layer on a substrate; forming a ruthenium layer on the tantalum nitride layer; and exposing the tantalum nitride layer and ruthenium layer to a plasma comprising a mixture of hydrogen (H2) and argon (Ar) to form a tantalum doped ruthenium layer thereon. Apparatuses for performing the methods are also described.

公开(公告)号：US20250022750A1

公开(公告)日：2025-01-16

申请号：US18753020

申请日：2024-06-25

Applicant: Applied Materials, Inc.

Inventor： Shinjae Hwang ,  Yoon Ah Shin ,  Feng Chen ,  Bencherki Mebarki ,  Joung Joo Lee ,  Xianmin Tang

IPC: H01L21/768

Abstract: Embodiments of the disclosure provide methods of forming interconnect structures in the manufacture of microelectronic devices. In one or more embodiments, microelectronic devices described herein comprise at least one top interconnect structure that is interconnected to at least one bottom interconnect structure. Embodiments of the disclosure relate to methods of improving barrier layer and metal liner properties in the interconnect structures without increasing capacitance and/or damaging other layers. In some embodiments, the barrier layer is treated with microwave radiation. The treatment process can be implemented in a processing tool including a modular high-frequency emission source.

公开(公告)号：US20240258103A1

公开(公告)日：2024-08-01

申请号：US18422656

申请日：2024-01-25

Applicant: Applied Materials, Inc.

Inventor： Jiajie Cen ,  Ge Qu ,  Shinjae Hwang ,  Zheng Ju ,  Yang Zhou ,  Zhiyuan Wu ,  Feng Chen ,  Kevin Kashefi

IPC: H01L21/02 ,  H01L21/768

CPC classification number: H01L21/02274 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76843

Abstract: Embodiments of the disclosure relate to methods for forming electrical interconnects. Additional embodiments provide methods of forming and treating barrier and liner layers to improve film and material properties. In some embodiments, the resulting composite layers provide improved resistivity, decrease void formation and improve device reliability.