ANTI-MICROBIAL AND ANTI-STATIC SURFACE TREATMENT AGENT WITH QUATERNARY AMMONIUM SALT AS ACTIVE INGREDIENT AND METHOD FOR PREVENTING STATIC ELECTRICITY IN POLYMER FIBERS USING SAME
    3.
    发明申请
    ANTI-MICROBIAL AND ANTI-STATIC SURFACE TREATMENT AGENT WITH QUATERNARY AMMONIUM SALT AS ACTIVE INGREDIENT AND METHOD FOR PREVENTING STATIC ELECTRICITY IN POLYMER FIBERS USING SAME 有权
    具有季铵盐作为活性成分的抗微生物和抗静电表面处理剂以及使用该聚合物纤维预防静电力的方法

    公开(公告)号:US20130183456A1

    公开(公告)日:2013-07-18

    申请号:US13824130

    申请日:2011-08-10

    申请人: Seong Cheol Kim

    发明人: Seong Cheol Kim

    IPC分类号: C07C211/63

    CPC分类号: C07C211/63 C08L77/06

    摘要: Provided are an anti-static and anti-microbial surface treatment agent including a quaternary ammonium salt compound as an active ingredient and a method of preventing a polymer fiber from developing static electricity by using the surface treatment agent. The quaternary ammonium salt compound has excellent anti-static and anti-microbial effects for the prevention or improvement of static electricity in a polymer fiber. Accordingly, the quaternary ammonium salt compound is suitable for use as a fabric softener, or an anti-static agent, and also, provides anti-microbial effects to a polymer fiber.

    摘要翻译: 提供了包含季铵盐化合物作为活性成分的抗静电和抗微生物表面处理剂以及通过使用表面处理剂防止聚合物纤维发生静电的方法。 季铵盐化合物具有优异的抗静电和抗微生物效果,用于防止或改善聚合物纤维中的静电。 因此,季铵盐化合物适合用作织物柔软剂或抗静电剂,并且还对聚合物纤维提供抗微生物作用。

    Semiconductor package module
    4.
    发明授权
    Semiconductor package module 有权
    半导体封装模块

    公开(公告)号:US08395245B2

    公开(公告)日:2013-03-12

    申请号:US11953967

    申请日:2007-12-11

    IPC分类号: H01L23/495

    摘要: A semiconductor package module includes a circuit board including a board body having a receiving portion and conductive patterns formed on the board body; a semiconductor package received in the receiving portion and having conductive terminals electrically connected to the conductive patterns and an s semiconductor chip electrically connected to the conductive terminals; and a connection member electrically connecting the conductive patterns and the conductive terminals. In the present invention, after a receiving portion having a receiving space is formed in the board body of a circuit board and a semiconductor package is received in the receiving portion, and a connection terminal of the semiconductor package and a conductive pattern of the board body are electrically connected using a connection member, a plurality of semiconductor packages can be stacked in a single circuit board without increasing the thickness thereby significantly improving data storage capacity and data processing speed of the semiconductor package module.

    摘要翻译: 一种半导体封装模块,包括:电路板,包括具有接收部分的基板主体和形成在所述基板主体上的导电图案; 接收在所述接收部分中并且具有电连接到所述导电图案的导电端子和与所述导电端子电连接的半导体芯片的半导体封装; 以及电连接导电图案和导电端子的连接构件。 在本发明中,在电路基板的基板主体中形成具有接收空间的接收部分,并且在接收部分中接收半导体封装的接收部分,以及半导体封装的连接端子和板体的导电图案 使用连接构件电连接,多个半导体封装可以堆叠在单个电路板中而不增加厚度,从而显着提高半导体封装模块的数据存储容量和数据处理速度。

    APPARATUS FOR PREVENTING CORROSION OF IF CONNECTOR IN PORTABLE TERMINAL AND METHOD THEREOF
    5.
    发明申请
    APPARATUS FOR PREVENTING CORROSION OF IF CONNECTOR IN PORTABLE TERMINAL AND METHOD THEREOF 审中-公开
    防止连接器在便携式终端中的腐蚀的装置及其方法

    公开(公告)号:US20130043739A1

    公开(公告)日:2013-02-21

    申请号:US13562239

    申请日:2012-07-30

    IPC分类号: H01H1/60

    CPC分类号: H04M1/0274 Y10T307/924

    摘要: The present disclosure provides an apparatus and a method for preventing an Intermediate Frequency (IF) connector from being corroded in a portable terminal. The apparatus may comprise an IF connector and a load switch that is mounted in a main board. The load switch is configured to communicate with the IF connector and to prevent a reverse voltage from being applied to the IF connector.

    摘要翻译: 本公开提供了一种用于防止中频(IF)连接器在便携式终端中被腐蚀的装置和方法。 该装置可以包括安装在主板中的IF连接器和负载开关。 负载开关配置为与IF连接器通信,并防止反向电压施加到IF连接器。

    PRINTED CIRCUIT BOARD
    7.
    发明申请
    PRINTED CIRCUIT BOARD 失效
    印刷电路板

    公开(公告)号:US20110108982A1

    公开(公告)日:2011-05-12

    申请号:US12835043

    申请日:2010-07-13

    IPC分类号: H01L23/488 H05K1/11 H05K1/09

    摘要: A printed circuit board includes a body part formed with connection pads on a first surface thereof; and a warpage compensating part formed over the first surface of the body part and having a height that increases from edges toward a center of the warpage compensating part so that an upper surface of the warpage compensating part facing away from the first surface of the body part is convex upward. The warpage compensating part comprises conductive layer patterns formed over the first surface of the body part to be electrically connected to the connection pads; and a solder resist formed over the first surface of the body part so as to expose the conductive layer patterns. The height of the solder resist gradually increases from both edges toward a center of the solder resist.

    摘要翻译: 印刷电路板包括在其第一表面上形成有连接焊盘的主体部分; 以及翘曲补偿部,其形成在主体部的第一表面上,并且具有从边缘朝向翘曲补偿部的中心增大的高度,使得翘曲补偿部的上表面背离主体部的第一表面 向上凸起 翘曲补偿部分包括形成在主体部分的第一表面上以电连接到连接焊盘的导电层图案; 以及形成在主体部分的第一表面上的阻焊剂,以暴露导电层图案。 阻焊剂的高度从阻焊层的两个边缘向中心逐渐增加。

    SEMICONDUCTOR PACKAGE MODULE
    8.
    发明申请
    SEMICONDUCTOR PACKAGE MODULE 有权
    半导体封装模块

    公开(公告)号:US20090121326A1

    公开(公告)日:2009-05-14

    申请号:US11953967

    申请日:2007-12-11

    IPC分类号: H01L23/495 H01L23/538

    摘要: A semiconductor package module includes a circuit board including a board body having a receiving portion and conductive patterns formed on the board body; a semiconductor package received in the receiving portion and having conductive terminals electrically connected to the conductive patterns and an s semiconductor chip electrically connected to the conductive terminals; and a connection member electrically connecting the conductive patterns and the conductive terminals. In the present invention, after a receiving portion having a receiving space is formed in the board body of a circuit board and a semiconductor package is received in the receiving portion, and a connection terminal of the semiconductor package and a conductive pattern of the board body are electrically connected using a connection member, a plurality of semiconductor packages can be stacked in a single circuit board without increasing the thickness thereby significantly improving data storage capacity and data processing speed of the semiconductor package module.

    摘要翻译: 一种半导体封装模块,包括:电路板,包括具有接收部分的基板主体和形成在所述基板主体上的导电图案; 接收在所述接收部分中并且具有电连接到所述导电图案的导电端子和与所述导电端子电连接的半导体芯片的半导体封装; 以及电连接导电图案和导电端子的连接构件。 在本发明中,在电路基板的基板主体中形成具有接收空间的接收部分,并且在接收部分中接收半导体封装的接收部分,以及半导体封装的连接端子和板体的导电图案 使用连接构件电连接,多个半导体封装可以堆叠在单个电路板中而不增加厚度,从而显着提高半导体封装模块的数据存储容量和数据处理速度。

    PRINTED CIRCUIT BOARD AND FLIP CHIP PACKAGE USING THE SAME WITH IMPROVED BUMP JOINT RELIABILITY
    9.
    发明申请
    PRINTED CIRCUIT BOARD AND FLIP CHIP PACKAGE USING THE SAME WITH IMPROVED BUMP JOINT RELIABILITY 有权
    印刷电路板和使用相同的FLIP芯片封装具有改进的BUMP接合可靠性

    公开(公告)号:US20080277783A1

    公开(公告)日:2008-11-13

    申请号:US11760010

    申请日:2007-06-08

    IPC分类号: H01L23/48

    摘要: A printed circuit board and a flip chip package using the same are designed to minimize thermal stress due to different thermal coefficients present in areas having metal lines and solder resist versus other areas on the printed circuit board. The printed circuit board includes an insulation layer; a first metal line formed on one surface of the insulation layer and having at one end thereof a bump land and a projection which integrally extends from the bump land; a second metal line formed on the other surface of the insulation layer and having at one end thereof a ball land; a via metal line formed through the insulation layer to connect the first and second metal lines to each other; and solder resists formed on the upper and lower surfaces of the insulation layer to expose the bump land and the ball land.

    摘要翻译: 印刷电路板和使用其的倒装芯片封装被设计成使得存在于具有金属线和阻焊剂的区域中存在的不同热系数与印刷电路板上的其它区域的热应力最小化。 印刷电路板包括绝缘层; 形成在所述绝缘层的一个表面上的第一金属线,并且在其一个端部处具有凸起区域和从所述凸起区域整体延伸的突起; 形成在所述绝缘层的另一个表面上并且在其一个端部处具有球形区域的第二金属线; 通过绝缘层形成的通孔金属线,以将第一和第二金属线彼此连接; 以及形成在绝缘层的上表面和下表面上的阻焊剂,以暴露凸起部分和球状区域。

    Method and apparatus for estimating a signal sequence in a MIMO-OFDM mobile communication system
    10.
    发明授权
    Method and apparatus for estimating a signal sequence in a MIMO-OFDM mobile communication system 有权
    用于估计MIMO-OFDM移动通信系统中的信号序列的方法和装置

    公开(公告)号:US07333549B2

    公开(公告)日:2008-02-19

    申请号:US10756073

    申请日:2004-01-12

    IPC分类号: H04L27/28

    摘要: A apparatus and method for estimating a sequence of transmitted quadrature amplitude modulation (QAM)-modulated signals and space-time block coded signals using an optimal expectation-maximization (EM)-based iterative estimation algorithm in a multiple-input and multiple-output (MIMO)-orthogonal frequency division multiplexing (OFDM) mobile communication system. An initial sequence estimation value is produced on the basis of a predetermined initial value using a pilot sub-carrier contained in each of OFDM signals received by a receiving side. A normalized value of a received signal on a channel-by-channel basis is produced by a predetermined equation using orthogonality between the OFDM signals received by the receiving side. At least one subsequent sequence estimation value is produced using the initial sequence estimation value and the normalized value of the received signal on the channel-by-channel basis. If the subsequent sequence estimation value converges to a constant value after an operation of producing the subsequent sequence estimation value is iterated the predetermined number of times, the converged subsequent sequence estimation value is designated as a final sequence estimation value.

    摘要翻译: 一种用于在多输入和多输出中使用最佳期望最大化(EM)的迭代估计算法来估计发送的正交幅度调制(QAM)调制信号和时空块编码信号的序列的装置和方法 MIMO) - 正交频分复用(OFDM)移动通信系统。 使用包含在由接收侧接收的每个OFDM信号中的导频子载波,基于预定初始值产生初始序列估计值。 通过使用由接收侧接收的OFDM信号之间的正交性的预定方程式,在逐个信道的基础上产生接收信号的归一化值。 使用初始序列估计值和逐个信道的接收信号的归一化值来产生至少一个后续序列估计值。 如果后续序列估计值在产生后续序列估计值的操作被迭代预定次数之后收敛到常数值,则将收敛后续序列估计值指定为最终序列估计值。