摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
In surface packaging of thin resin packages such as surface mount resin molded memory ICs or the like, cracks of the package occur frequently at a solder reflow step where thermal impact is applied to the package because the resin has absorbed moisture before packaging. To solve this problem, the devices are sealed, by heat-sealing, in a bag moisture-tight at an assembly step of the resin molded devices where the resin is still dry, and are taken out from the bags immediately before the execution of surface packaging. The devices are packaged in a moisture-proofing bag made of a laminate film, and a desiccant is sealed, by heat-sealing the bag, in the moisture-proofing bag together with the, e.g., surface mount semiconductor device having a plastic package encapsulating the semiconductor device. A caution is provided for the bag, that the devices should be presented from moisture absorption after opening the bag.
摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
A semiconductor device has a semi-conductor chip 1 having bonding pads 2 thereon, conductive leads 4, each of which comprises an inner lead 41 and an outer lead 42, insulating adhesive tapes 3 by which each of the inner leads 41 of the leads 4 is stuck to the surface 1a of the semiconductor chip 1, bonding wires 6 by which each of the leads 4 is electrically connected to each corresponding bonding pad 2. The semiconductor chip 1, bonding pad 2, adhesive tapes 3, inner leads 41, and bonding wires 6 are molded by a molding resin 5. The boundary of the inner lead 41 and the cuter lead 42 of the lead 4 is bent in S-shape so that there is a step between inner lead 41 and the upper side portion 42a of the outer lead 42 in a certain depth. Then the outer lead 42 protrude out of the molding resin and extend in J-shape. The surface 4a of the upper side portion 42a of the outer lead 42 is higher than the top of the looped bonding wire 6.
摘要:
A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.
摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
A pair of DRAM chips 1A and 1B are mounted opposedly to each other with wiring means such as lead frames put therebetween, the lead frames being substantially integral with external terminals 3B. Then, these DRAM chips and lead frames are connected together by the conventional wire bonding method. Plural pairs of the thus-connected DRAM chips and lead frames are stacked and corresponding leads of the lead frames are connected in common to form a laminate. The plural DRAM chips thus mounted are activated selectively in accordance with a predetermined chip selection signal. Additionally, partial DRAM chips capable of partially functioning normally are combined together by utilizing the above chip mounting method to constitute a single DRAM package.
摘要:
In surface packaging of thin resin packages such as resin molded memory ICs cracks of the package occur frequently at a solder reflow step where thermal impact is applied to the package because the resin has absorbed moisture before packaging. To solve this problem, the devices are packaged moisture-tight at an assembly step of the resin molded devices where the resin is still dry, and are taken out from the bags immediately before the execution of surface packaging.