公开(公告)号：US20120005875A1

公开(公告)日：2012-01-12

申请号：US13240508

申请日：2011-09-22

Applicant: Kazuhiro Tashiro ,  Keisuke Fukuda ,  Naohito Kohashi ,  Shigeyuki Maruyama

Inventor： Kazuhiro Tashiro ,  Keisuke Fukuda ,  Naohito Kohashi ,  Shigeyuki Maruyama

IPC: B23P11/00

CPC classification number: H01L21/67333 ,  H01L21/50 ,  H01L22/20 ,  H01L23/04 ,  H01L23/544 ,  H01L25/0655 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/16153 ,  H01L2924/1616 ,  H01L2924/166 ,  Y10T29/49826 ,  H01L2924/00

Abstract: A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.

Abstract translation: 公开了一种用于保护半导体器件的方法，其可以提高半导体器件的性能测试的可靠性，并防止在运输或包装期间对半导体器件的损坏。 由于包含半导体芯片和具有不同高度的电气部件，所以具有高度不均匀性的半导体器件附着IC盖。 IC盖包括突出部分和基部。 在安装到半导体器件之后，突出部分位于半导体器件中的自由区域中，并且基底部分由与半导体芯片和半导体器件中的电气部件分离的突起支撑。 IC盖可拆卸地附接到半导体器件。

公开(公告)号：US20110272796A1

公开(公告)日：2011-11-10

申请号：US12874212

申请日：2010-09-01

Applicant: Mark F. Eaton ,  Curtis Nathan Potter ,  Andrew Miner

Inventor： Mark F. Eaton ,  Curtis Nathan Potter ,  Andrew Miner

IPC: H01L23/02 ,  H01L21/50

CPC classification number: H01L21/50 ,  B81C1/00269 ,  H01L23/055 ,  H01L23/10 ,  H01L24/48 ,  H01L24/85 ,  H01L24/95 ,  H01L24/97 ,  H01L2224/292 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/4823 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/163 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A structure and method for cold weld compression bonding using a metallic nano-structured gasket is provided. This structure and method allows a hermetic package to be formed at lower pressures and temperatures than are possible using bulk or conventional thin-film gasket materials.

Abstract translation: 提供了一种使用金属纳米结构的垫圈进行冷焊压接的结构和方法。 这种结构和方法允许在比使用本体或常规薄膜垫圈材料可能的较低压力和温度下形成密封包装。

公开(公告)号：US20110268977A1

公开(公告)日：2011-11-03

申请号：US13181614

申请日：2011-07-13

Applicant: Yuji KIMURA ,  Hiroki HORIGUCHI

Inventor： Yuji KIMURA ,  Hiroki HORIGUCHI

IPC: B32B15/04

CPC classification number: B81C3/001 ,  B81C1/00269 ,  B81C2203/0109 ,  B81C2203/019 ,  B81C2203/036 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/166 ,  H01L2924/3025 ,  Y10T428/31678 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In a method for producing an electronic component device, a heat bonding step is performed in a state in which low melting point metal layers including low melting point metals including, for example, Sn as the main component, are arranged to sandwich, in the thickness direction, a high melting point metal layer including a high melting point metal including, for example, Cu as the main component, which is the same or substantially the same as high melting point metals defining first and second conductor films to be bonded. In order to generate an intermetallic compound of the high melting point metal and the low melting point metal, the distance in which the high melting point metal is to be diffused in each of the low melting point metal layers is reduced. Thus, the time required for the diffusion is reduced, and the time required for the bonding is reduced.

Abstract translation: 在电子部件装置的制造方法中，以包含例如以Sn为主要成分的低熔点金属的低熔点金属层配置成将厚度夹层的状态进行热粘合工序 方向，包括例如以Cu为主要成分的高熔点金属的高熔点金属层，其与限定要结合的第一和第二导体膜的高熔点金属相同或基本相同。 为了产生高熔点金属和低熔点金属的金属间化合物，降低了在每个低熔点金属层中高熔点金属扩散的距离。 因此，扩散所需的时间减少，并且键合所需的时间减少。

公开(公告)号：US08022551B2

公开(公告)日：2011-09-20

申请号：US11399856

申请日：2006-04-07

Applicant: Tasao Soga ,  Hanae Shimokawa ,  Tetsuya Nakatsuka ,  Kazuma Miura ,  Mikio Negishi ,  Hirokazu Nakajima ,  Tsuneo Endoh

Inventor： Tasao Soga ,  Hanae Shimokawa ,  Tetsuya Nakatsuka ,  Kazuma Miura ,  Mikio Negishi ,  Hirokazu Nakajima ,  Tsuneo Endoh

IPC: H01L29/40

CPC classification number: H01L24/13 ,  B32B15/01 ,  C22C5/02 ,  C22C9/02 ,  C22C11/06 ,  C22C13/00 ,  H01L21/50 ,  H01L21/56 ,  H01L21/563 ,  H01L23/10 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/4924 ,  H01L23/49513 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81024 ,  H01L2224/81054 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/8121 ,  H01L2224/81409 ,  H01L2224/81815 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01088 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15738 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/141 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/0215 ,  H05K2201/045 ,  H05K2201/09572 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01031 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/83205

Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, or other materials and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.

Abstract translation: 在半导体器件和衬底之间形成的每一个接合点包括Cu的金属球或Sn的其它材料和化合物以及金属球，金属球通过化合物结合在一起。

公开(公告)号：US20100291399A1

公开(公告)日：2010-11-18

申请号：US12310516

申请日：2007-09-03

Applicant: Rikiya Kato ,  Mitsuo Zen

Inventor： Rikiya Kato ,  Mitsuo Zen

IPC: B32B15/02 ,  B23K1/20

CPC classification number: C22C13/00 ,  B23K35/025 ,  B23K35/262 ,  B23K35/302 ,  B23K2101/36 ,  C22C1/04 ,  C22C9/02 ,  C22C9/04 ,  C22C9/06 ,  H01L23/06 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/0102 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16195 ,  H01L2924/166 ,  Y10T428/12063 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: As a replacement for high-temperature solder having a solidus temperature of at least 250° C. for bonding a package and a lid of a functional part, a solder paste formed by mixing a Cu-based metal powder with a solidus temperature of at least 400° C. and an Sn-based solder powder is applied to a lid of a difficult to solder material which was previously subjected to plating having good solderability and heated to obtain a solder layer comprising the Cu-based metal powder, Cu6Sn5 intermetallic compounds, and lead-free solder on the plated surface. The intermetallic compounds are bonded to the difficult to solder material and the intermetallic compounds are connected to each other, so the solder layer functions as a high-temperature solder. The problem of poor solderability of high-temperature solders is avoided by the present invention.

Abstract translation: 作为将固相线温度为至少250℃的高温焊料替代为将封装和功能部件的盖接合，通过将Cu基金属粉末与固相线温度至少混合而形成的焊膏 400℃，并且将Sn基焊料粉末施加到先前经受了具有良好可焊性的电镀的难焊接材料的盖子上，并加热以获得包含Cu基金属粉末，Cu 6 Sn 5金属间化合物， 和镀层表面上的无铅焊料。 金属间化合物与难焊接材料接合，金属间化合物彼此连接，因此焊料层用作高温焊料。 本发明避免了高温焊料焊接性差的问题。

公开(公告)号：US07807481B2

公开(公告)日：2010-10-05

申请号：US12081961

申请日：2008-04-24

Applicant: Kazuhiro Tashiro ,  Keisuke Fukuda ,  Naohito Kohashi ,  Shigeyuki Maruyama

Inventor： Kazuhiro Tashiro ,  Keisuke Fukuda ,  Naohito Kohashi ,  Shigeyuki Maruyama

IPC: H01L21/66

CPC classification number: H01L21/67333 ,  H01L21/50 ,  H01L22/20 ,  H01L23/04 ,  H01L23/544 ,  H01L25/0655 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/16153 ,  H01L2924/1616 ,  H01L2924/166 ,  Y10T29/49826 ,  H01L2924/00

Abstract: A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.

Abstract translation: 公开了一种用于保护半导体器件的方法，其可以提高半导体器件的性能测试的可靠性，并防止在运输或包装期间对半导体器件的损坏。 由于包含半导体芯片和具有不同高度的电气部件，所以具有高度不均匀性的半导体器件附着IC盖。 IC盖包括突出部分和基部。 在安装到半导体器件之后，突出部分位于半导体器件中的自由区域中，并且基底部分由与半导体芯片和半导体器件中的电气部件分离的突起支撑。 IC盖可拆卸地附接到半导体器件。

公开(公告)号：US07729129B2

公开(公告)日：2010-06-01

申请号：US11873445

申请日：2007-10-17

Applicant: Masafumi Shigaki ,  Isao Nakazawa ,  Kazunori Yamanaka

Inventor： Masafumi Shigaki ,  Isao Nakazawa ,  Kazunori Yamanaka

IPC: H05K9/00

CPC classification number: H05K1/021 ,  H01L23/66 ,  H01L25/165 ,  H01L2223/6627 ,  H01L2924/1423 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1616 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/19032 ,  H05K1/0203 ,  H05K1/0243 ,  H05K1/142 ,  H05K1/182 ,  H05K3/0061 ,  H05K2201/0323 ,  H05K2201/09745 ,  H05K2201/10166 ,  H05K2201/10409

Abstract: In a package mounting structure for mounting a package on a case, wherein the package internally incorporates at least one of a high-frequency transistor, MIC and MMIC used in the microwave to millimeter-wave band, and a base thereof is formed of metal and serves as ground, an electrically conductive sheet having excellent thermal conductivity and exhibiting restorability and having a size identical with that of the base of the package is laid on the case at a package-bearing location, the package and sheet are fastened together by two or more screws, and the sheet is mounted on the case while it is pressed by a pressing force of 10 N/cm2 or greater owing to fastening.

Abstract translation: 在用于将封装安装在外壳上的封装安装结构中，其中封装内部包含微波至毫米波段中使用的高频晶体管，MIC和MMIC中的至少一个，其基极由金属和 作为地面，具有优异的导热性并具有恢复性并且具有与包装的基座的尺寸相同的尺寸的导电片被放置在封装承载位置的壳体上，封装和片材通过两个或 更多的螺钉，并且当由于紧固而以10N / cm 2或更大的压力按压时，该片被安装在外壳上。

公开(公告)号：US20090283876A1

公开(公告)日：2009-11-19

申请号：US12119654

申请日：2008-05-13

Applicant: J. Richard Behun ,  Erwin B. Cohen

Inventor： J. Richard Behun ,  Erwin B. Cohen

IPC: H01L23/552 ,  H01L21/58

CPC classification number: H01L23/552 ,  H01L23/04 ,  H01L23/10 ,  H01L24/16 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/3025

Abstract: A semiconductor package structure including a conductive adhesive material which is used to form an electromagnetic interference shield-forming Faraday cage. The Faraday cage incorporates a module lid as the top surface thereof, the conductive material as the sides and a laminate ground plane(s) or substrate as its bottom. Also disclosed is a method for fabricating the foregoing semiconductor package structure.

Abstract translation: 一种半导体封装结构，包括用于形成电磁干扰屏蔽成形法拉第笼的导电粘合剂材料。 法拉第笼包含模块盖作为其顶表面，导电材料作为侧面，并且层压接地平面或基底作为其底部。 还公开了制造上述半导体封装结构的方法。

公开(公告)号：US20090152688A1

公开(公告)日：2009-06-18

申请号：US11956132

申请日：2007-12-13

Applicant: Byung Tai Do ,  Heap Hoe Kuan ,  Rui Huang

Inventor： Byung Tai Do ,  Heap Hoe Kuan ,  Rui Huang

IPC: H01L23/552 ,  H01L21/58

CPC classification number: H01L23/552 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49179 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16153 ,  H01L2924/16195 ,  H01L2924/1626 ,  H01L2924/166 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An integrated circuit package system comprising: providing a substrate; coupling an integrated circuit to the substrate; mounting a shielding element around the integrated circuit; applying a conductive shielding layer on the shielding element; and coupling a system interconnect to the shielding element.

Abstract translation: 一种集成电路封装系统，包括：提供衬底; 将集成电路耦合到所述衬底; 将屏蔽元件安装在集成电路周围; 在屏蔽元件上施加导电屏蔽层; 并将系统互连件耦合到屏蔽元件。

公开(公告)号：US20080093718A1

公开(公告)日：2008-04-24

申请号：US11958889

申请日：2007-12-18

Applicant: Jeanne Pavio

Inventor： Jeanne Pavio

IPC: H01L23/495 ,  H01L21/58

CPC classification number: H01L24/81 ,  H01L23/047 ,  H01L23/3675 ,  H01L23/3737 ,  H01L23/49816 ,  H01L23/66 ,  H01L24/29 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/166 ,  H01L2924/3011 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor component having a semiconductor chip mounted on a packaging substrate and a method for manufacturing the semiconductor component that uses batch processing steps for fabricating the packaging substrate. A heatsink is formed using an injection molding process. The heatsink has a front surface for mating with a semiconductor chip and a leadframe assembly. The heatsink also has a back surface from which a plurality of fins extend. The leadframe assembly includes a leadframe having leadframe leads extending from opposing sides of the leadframe to a central area of the leadframe. A liquid crystal polymer is disposed in a ring-shaped pattern on the leadframe leads. The liquid crystal polymer is partially cured. The leadframe assembly is mounted on the front surface of the heatsink and the liquid crystal polymer is further cured to form a packaging assembly, which is then singulated into packaging substrates.

Abstract translation: 具有安装在封装基板上的半导体芯片的半导体部件和使用批量处理步骤制造封装基板的半导体部件的制造方法。 使用注射成型工艺形成散热器。 散热器具有用于与半导体芯片和引线框架组件配合的前表面。 散热片还具有多个翅片从该表面延伸的后表面。 引线框架组件包括引线框架，该引线框架具有从引线框架的相对侧延伸到引线框架的中心区域的引线框引线。 液晶聚合物以引线框架引线上的环状图案设置。 液晶聚合物部分固化。 引线框架组件安装在散热器的前表面上，并且液晶聚合物进一步固化以形成包装组件，然后将其包装成包装衬底。