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    High-frequency circuit package and high-frequency circuit device
    2.
    发明授权
    High-frequency circuit package and high-frequency circuit device 有权
    高频电路封装和高频电路器件

    公开(公告)号：US08552304B2

    公开(公告)日：2013-10-08

    申请号：US13157499

    申请日：2011-06-10

    Applicant: Satoshi Masuda

    Inventor： Satoshi Masuda

    IPC: H05K1/03

    CPC classification number: H01L23/057 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49861 ,  H01L23/66 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/166 ,  H01L2924/167 ,  H01L2924/16787 ,  H01L2924/1903 ,  H01L2924/19033 ,  H01L2924/19039 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01P3/006 ,  H01P5/028 ,  H01L2924/00

    Abstract: A high-frequency circuit package including a dielectric substrate; a signal line, a first ground conductor layer, a second ground conductor layer, and a frame-shaped dielectric layer formed on the dielectric substrate; a third ground conductor layer formed on the frame-shaped dielectric layer; a first recess formed in the frame-shaped dielectric layer and including a first surface and a second surface that are located above the first ground conductor layer and the second ground conductor layer and extend laterally at an oblique angle with respect to the length direction of the signal line; a first ground line formed on the first surface and electrically connecting the first ground conductor layer with the third ground conductor layer; and a second ground line formed on the second surface and electrically connecting the second ground conductor layer with the third ground conductor layer.

    Abstract translation: 一种包括电介质基片的高频电路封装; 信号线，第一接地导体层，第二接地导体层和形成在电介质基板上的框状电介质层; 形成在所述框状电介质层上的第三接地导体层; 形成在所述框状电介质层中并且包括第一表面和第二表面的第一凹部，所述第一表面和第二表面位于所述第一接地导体层和所述第二接地导体层之上，并且相对于所述第一接地导体层的长度方向以倾斜角横向延伸 信号线 形成在所述第一表面上并将所述第一接地导体层与所述第三接地导体层电连接的第一接地线; 以及第二接地线，形成在所述第二表面上并将所述第二接地导体层与所述第三接地导体层电连接。

    Power semiconductor module and method for its production
    4.
    发明授权
    Power semiconductor module and method for its production 有权
    功率半导体模块及其生产方法

    公开(公告)号：US07965516B2

    公开(公告)日：2011-06-21

    申请号：US12505950

    申请日：2009-07-20

    Applicant: Jürgen Steger ,  Marco Lederer

    Inventor： Jürgen Steger ,  Marco Lederer

    IPC: H05K7/20

    CPC classification number: H01L23/10 ,  H01L23/053 ,  H01L23/3735 ,  H01L23/4093 ,  H01L25/072 ,  H01L2924/0002 ,  H01L2924/166 ,  H01L2924/00

    Abstract: A power semiconductor module that includes a substrate having at least one power semiconductor element; a heat sink for dissipation of heat from the at least one power semiconductor element and a housing having a cutout which is arranged on a lower face of the housing facing the heat sink and holds the substrate; and to a method for production of such power semiconductor modules. The power semiconductor module has at least one holding element, which engages in a recess, which is associated with the at least one holding element, on the lower face of the housing and is designed such that it limits any movement of the substrate in the direction of the lower face of the housing.

    Abstract translation: 一种功率半导体模块，包括具有至少一个功率半导体元件的衬底; 用于从所述至少一个功率半导体元件散热的散热器和具有切口的壳体，所述切口布置在所述壳体的面对所述散热器的下表面并保持所述基板; 以及用于生产这种功率半导体模块的方法。 所述功率半导体模块具有至少一个保持元件，该保持元件在壳体的下表面上接合在与所述至少一个保持元件相关联的凹部中，并且被设计成使得其限制所述基板在所述方向上的任何移动 的外壳的下面。

    Chip assembly including package element and integrated circuit chip
    6.
    发明授权
    Chip assembly including package element and integrated circuit chip 有权
    芯片组件包括封装元件和集成电路芯片

    公开(公告)号：US07737513B2

    公开(公告)日：2010-06-15

    申请号：US11809213

    申请日：2007-05-30

    Applicant: Belgacem Haba ,  Charles White ,  Michael J. Nystrom

    Inventor： Belgacem Haba ,  Charles White ,  Michael J. Nystrom

    IPC: H01L29/84 ,  H01L21/58

    CPC classification number: H01L21/50 ,  H01L23/16 ,  H01L23/3114 ,  H01L24/81 ,  H01L2223/6677 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/16235 ,  H01L2924/166 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    Abstract: The present invention provides an integrated circuit chip assembly and a method of manufacturing the same. The assembly includes a package element having a top surface and an integrated circuit chip having a top surface, a bottom surface, edge surface between the top and bottom surfaces, and contacts exposed at the top surface. The package element is disposed below the chip with the top surface of the package element facing toward the bottom surface of the chip. At least one spacer element resides between the top surface of the package element and the bottom surface of the chip. According to one embodiment, the at least one spacer element may form a substantially closed cavity between the package element and the integrated circuit chip. According to another embodiment, first conductive features may extend from the contacts of the chip along the top surface, and at least some of said first conductive features extend along at least one of the edge surfaces of the chip.

    Abstract translation: 本发明提供一种集成电路芯片组件及其制造方法。 组件包括具有顶表面的封装元件和集成电路芯片，其具有顶表面，底表面，顶表面和底表面之间的边缘表面以及暴露在顶表面处的触点。 封装元件设置在芯片的下方，封装元件的顶表面朝向芯片的底表面。 至少一个间隔元件位于封装元件的顶表面和芯片的底表面之间。 根据一个实施例，所述至少一个间隔元件可以在封装元件和集成电路芯片之间形成基本封闭的空腔。 根据另一个实施例，第一导电特征可以沿着顶表面从芯片的触点延伸，并且至少一些所述第一导电特征沿芯片的至少一个边缘表面延伸。

    LID OR CASE FOR SEALED PACKAGE AND METHOD FOR MANUFACTURING THE SAME
    7.
    发明申请
    LID OR CASE FOR SEALED PACKAGE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    用于密封包装的盖子或壳体及其制造方法

    公开(公告)号：US20100006336A1

    公开(公告)日：2010-01-14

    申请号：US12305035

    申请日：2008-05-09

    Applicant: Tomohiro Shimada ,  Kenichi Miyazaki

    Inventor： Tomohiro Shimada ,  Kenichi Miyazaki

    IPC: H01L23/02 ,  H05K5/00 ,  B23K1/00

    CPC classification number: H01L23/10 ,  H01L21/50 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/166 ,  H01L2924/00

    Abstract: The present invention provides a lid or a case for a sealed package, which is provided with a frame-shaped soldering material on its face to be joined, wherein the frame-shaped soldering material is formed of aligned ball-shaped soldering materials having particle sizes of 10 to 300 μm. This lid or case can be manufactured by the steps of: (1) forming a droplet from the soldering material in a molten state; (2) discharging the soldering material which has been formed into the droplet onto the face to be joined of the lid or the case to fix the ball-shaped soldering material on the face; and (3) repeating the steps (1) and (2).

    Abstract translation: 本发明提供一种用于密封包装的盖或壳体，其在其待接合面上设置有框状焊接材料，其中框状焊接材料由具有粒径的对准的球形焊接材料形成 10到300个妈妈。 该盖或壳体可以通过以下步骤制造：（1）以熔融状态从焊料形成液滴; （2）将已经形成为液滴的焊接材料排出到要接合的盖或壳体的表面上以将球形焊接材料固定在表面上; 和（3）重复步骤（1）和（2）。

    Semiconductor apparatus having a cooling apparatus that compressively engages a semiconductor device
    10.
    发明授权
    Semiconductor apparatus having a cooling apparatus that compressively engages a semiconductor device 有权
    具有压缩地接合半导体器件的冷却装置的半导体装置

    公开(公告)号：US07348664B2

    公开(公告)日：2008-03-25

    申请号：US11133683

    申请日：2005-05-20

    Applicant: Seyd M. Sobhani

    Inventor： Seyd M. Sobhani

    IPC: H01L23/34

    CPC classification number: H01L23/10 ,  H01L23/367 ,  H01L23/473 ,  H01L24/72 ,  H01L25/072 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/15787 ,  H01L2924/166 ,  H01L2924/00

    Abstract: A semiconductor device comprises a semiconductor die, first and second electrically-conductive leads and first and second thermal elements. The die comprises first and second surfaces. The first lead is held in contact with the first surface of the die by a compressive force. The first thermal element is held in contact with a portion of the first lead by a compressive force such that the first thermal element is capable of removing heat from the first lead and from the die. The second lead is held in contact with the second surface of the die by a compressive force. The second thermal element is held in contact with a portion of the second lead by a compressive force such that the second thermal element is capable of removing heat from the second lead and from the die.

    Abstract translation: 半导体器件包括半导体管芯，第一和第二导电引线以及第一和第二热元件。 模具包括第一和第二表面。 第一引线通过压缩力与模具的第一表面保持接触。 第一热元件通过压缩力保持与第一引线的一部分接触，使得第一热元件能够从第一引线和模具移除热量。 第二引线通过压缩力与模具的第二表面保持接触。 第二热元件通过压缩力保持与第二引线的一部分接触，使得第二热元件能够从第二引线和模具移除热量。

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