公开(公告)号：US20170076998A1

公开(公告)日：2017-03-16

申请号：US15363365

申请日：2016-11-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Kangguo Cheng ,  Ramachandra Divakaruni ,  Jeehwan Kim ,  Juntao Li ,  Devendra K. Sadana

IPC分类号： H01L21/84 ,  H01L21/8238

CPC分类号： H01L21/845 ,  H01L21/02236 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/326 ,  H01L21/7624 ,  H01L21/823807 ,  H01L21/823821 ,  H01L27/0922 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/161 ,  H01L29/167 ,  H01L29/7849 ,  H01L29/785

摘要： A method for forming CMOS devices includes masking a first portion of a tensile-strained silicon layer of a SOI substrate, doping a second portion of the layer outside the first portion and growing an undoped silicon layer on the doped portion and the first portion. The undoped silicon layer becomes tensile-strained. Strain in the undoped silicon layer over the doped portion is relaxed by converting the doped portion to a porous silicon to form a relaxed silicon layer. The porous silicon is converted to an oxide. A SiGe layer is grown and oxidized to convert the relaxed silicon layer to a compressed SiGe layer. Fins are etched in the first portion from the tensile-strained silicon layer and the undoped silicon layer and in the second portion from the compressed SiGe layer.

公开(公告)号：US20170033261A1

公开(公告)日：2017-02-02

申请号：US14815513

申请日：2015-07-31

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Jeehwan Kim ,  Ning Li ,  Devendra K. Sadana

IPC分类号： H01L33/10 ,  H01L31/0304 ,  H01L31/0352 ,  H01L33/30 ,  H01L31/18 ,  H01L33/00 ,  H01L33/12 ,  H01L31/0232 ,  H01L31/105

CPC分类号： H01L33/105 ,  H01L31/02327 ,  H01L31/03046 ,  H01L31/035272 ,  H01L31/105 ,  H01L31/1844 ,  H01L31/1852 ,  H01L33/0066 ,  H01L33/12 ,  H01L33/30

摘要： An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer.

摘要翻译： 在含硅衬底顶上包括含锗缓冲层的光电器件，以及缓冲层上III-V族半导体材料层的第一分布式布拉格反射器堆叠。 光电子器件还包括存在于第一分布布拉格反射器堆叠上的III-V半导体材料的有源层，其中有源层和第一分布式布拉格反射器堆叠之间的晶格尺寸差在活性层中引起应变。 具有可存在于有源层上的III-V半导体材料层的第二分布式布拉格反射器堆叠。

公开(公告)号：US09537038B2

公开(公告)日：2017-01-03

申请号：US14941023

申请日：2015-11-13

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  BAY ZU PRECISION CO., LTD

发明人： Tze-Chiang Chen ,  Augustin J. Hong ,  Chien-Chih Huang ,  Yu-Wei Huang ,  Jeehwan Kim ,  Devendra K. Sadana ,  Chih-Fu Tseng

IPC分类号： H01L31/075 ,  H01L31/18 ,  H01L31/20 ,  H01L31/0224

CPC分类号： H01L31/075 ,  H01L31/022466 ,  H01L31/1804 ,  H01L31/1884 ,  H01L31/202 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

摘要： A method for forming a photovoltaic device includes depositing a p-type layer on a substrate. A barrier layer is formed on the p-type layer by exposing the p-type layer to an oxidizing agent. An intrinsic layer is formed on the barrier layer, and an n-type layer is formed on the intrinsic layer.

摘要翻译： 一种用于形成光伏器件的方法包括在衬底上沉积p型层。 通过将p型层暴露于氧化剂，在p型层上形成阻挡层。 在势垒层上形成本征层，在本征层上形成n型层。

公开(公告)号：US09530643B2

公开(公告)日：2016-12-27

申请号：US14645894

申请日：2015-03-12

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Cheng-Wei Cheng ,  Jeehwan Kim ,  John A. Ott ,  Devendra K. Sadana

IPC分类号： H01L21/20 ,  H01L21/02 ,  H01L21/308

CPC分类号： H01L21/0274 ,  H01L21/02378 ,  H01L21/02444 ,  H01L21/02485 ,  H01L21/02527 ,  H01L21/0254 ,  H01L21/02612 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/308

摘要： A method for forming an epitaxial structure includes providing a two-dimensional material on a crystal semiconductor material and opening up portions of the two-dimensional material to expose the crystal semiconductor material. A structure is epitaxially grown in the portions opened up in the crystal semiconductor material such that the epitaxial growth is selective to the exposed crystal semiconductor material relative to the two-dimensional material.

摘要翻译： 一种用于形成外延结构的方法包括在晶体半导体材料上提供二维材料并打开二维材料的部分以露出晶体半导体材料。 在晶体半导体材料中开放的部分中外延生长结构，使得外延生长对于暴露的晶体半导体材料相对于二维材料是选择性的。

公开(公告)号：US20160359070A1

公开(公告)日：2016-12-08

申请号：US14728364

申请日：2015-06-02

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Talia S. Gershon ,  Jeehwan Kim ,  Yun Seog Lee ,  Teodor K. Todorov

IPC分类号： H01L31/073 ,  H01L31/18

CPC分类号： H01L31/18 ,  H01L31/0326 ,  H01L31/0327 ,  H01L31/072 ,  Y02E10/50

摘要： A photovoltaic device includes a first contact layer formed on a substrate. An absorber layer includes Cu—Zn—Sn—S(Se) (CZTSSe) on the first contact layer. A buffer layer is formed in contact with the absorber layer. Metal dopants are dispersed in a junction region between the absorber layer and the buffer layer. The metal dopants have a valence between the absorber layer and the buffer layer to increase junction potential. A transparent conductive contact layer is formed over the buffer layer.

摘要翻译： 光伏器件包括形成在衬底上的第一接触层。 吸收层包括在第一接触层上的Cu-Zn-Sn-S（Se）（CZTSSe）。 缓冲层形成为与吸收层接触。 金属掺杂剂分散在吸收层和缓冲层之间的接合区域中。 金属掺杂剂在吸收层和缓冲层之间具有价态以增加结电位。 在缓冲层上形成透明导电接触层。

公开(公告)号：US20160351733A1

公开(公告)日：2016-12-01

申请号：US14727450

申请日：2015-06-01

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Talia S. Gershon ,  Richard A. Haight ,  Jeehwan Kim ,  Yun Seog Lee

IPC分类号： H01L31/0236 ,  H01L31/036 ,  H01L31/20

CPC分类号： H01L31/02366 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/036 ,  H01L31/03921 ,  H01L31/0747 ,  H01L31/1804 ,  H01L31/1864 ,  H01L31/208 ,  Y02E10/50

摘要： A method for texturing silicon includes loading a silicon wafer into a vacuum chamber, heating the silicon wafer and thermal cracking a gas to generate cracked sulfur species. The silicon wafer is exposed to the cracked sulfur species for a time duration in accordance with a texture characteristic needed for a surface of the silicon wafer.

公开(公告)号：US20160351397A1

公开(公告)日：2016-12-01

申请号：US15237198

申请日：2016-08-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Stephen W. Bedell ,  Joel P. De Souza ,  Jeehwan Kim ,  Devendra K. Sadana

IPC分类号： H01L21/228 ,  H01L21/24 ,  H01L21/02

CPC分类号： H01L29/66795 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/228 ,  H01L21/24 ,  H01L21/26513 ,  H01L21/288 ,  H01L21/324 ,  H01L21/7624 ,  H01L21/76251 ,  H01L21/76283 ,  H01L29/1054 ,  H01L29/1604 ,  H01L29/161 ,  H01L29/775 ,  H01L29/7842 ,  H01L29/785 ,  H01L29/78684 ,  H01L29/78696

摘要： A layer of amorphous silicon is formed on a germanium-on-insulator substrate, or a layer of germanium is formed on a silicon-on-insulator substrate. An anneal is then performed which causes thermal mixing of silicon and germanium atoms within one of the aforementioned structures and subsequent formation of a silicon germanium-on-insulator material.

公开(公告)号：US20160336395A1

公开(公告)日：2016-11-17

申请号：US14745146

申请日：2015-06-19

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Joel P. de Souza ,  Jeehwan Kim ,  Devendra K. Sadana ,  Brent A. Wacaser

IPC分类号： H01L29/06 ,  H01L29/201 ,  H01L29/207 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/24 ,  H01L29/78

CPC分类号： H01L29/267 ,  H01L29/0607 ,  H01L29/0634 ,  H01L29/0843 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/20 ,  H01L29/201 ,  H01L29/207 ,  H01L29/2206 ,  H01L29/227 ,  H01L29/24 ,  H01L29/263 ,  H01L29/66204 ,  H01L29/66219 ,  H01L29/66522 ,  H01L29/66969 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/861 ,  H01L29/8613

摘要： A semiconductor device includes a semiconductor substrate and a p-doped layer formed on the substrate having a dislocation density exceeding 108 cm−2. An n-type layer is formed on or in the p-doped layer. The n-type layer includes a II-VI material configured to tolerate the dislocation density to form an electronic device with reduced leakage current over a device with a III-V n-type layer.

公开(公告)号：US09484347B1

公开(公告)日：2016-11-01

申请号：US14969833

申请日：2015-12-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Kangguo Cheng ,  Ramachandra Divakaruni ,  Jeehwan Kim

IPC分类号： H01L27/00 ,  H01L27/092 ,  H01L29/06 ,  H01L21/8238

CPC分类号： H01L21/823821 ,  H01L21/3065 ,  H01L21/3247 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/823885 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/7831 ,  H01L29/785

摘要： A method for forming a complementary metal oxide semiconductor (CMOS) device includes growing a SiGe layer on a Si semiconductor layer, and etching fins through the SiGe layer and the Si semiconductor layer down to a buried dielectric layer. Spacers are formed on sidewalls of the fins, and a dielectric material is formed on top of the buried dielectric layer between the fins. The SiGe layer is replaced with a dielectric cap for an n-type device to form a Si fin. The Si semiconductor layer is converted to a SiGe fin for a p-type device by oxidizing the SiGe layer to condense Ge. The dielectric material is recessed to below the spacers, and the dielectric cap and the spacers are removed to expose the Si fin and the SiGe fin.

摘要翻译： 形成互补金属氧化物半导体（CMOS）器件的方法包括在Si半导体层上生长SiGe层，并将通过SiGe层和Si半导体层的散热片蚀刻到埋入的介质层。 间隔件形成在翅片的侧壁上，并且介电材料形成在散热片之间的掩埋介电层的顶部。 SiGe层被用于n型器件的电介质盖替代以形成Si鳍。 Si半导体层通过氧化SiGe层而将Ge转变为用于p型器件的SiGe鳍。 电介质材料凹入到间隔物的下方，并且去除电介质盖和间隔物以暴露Si鳍和SiGe鳍。

公开(公告)号：US20160276524A1

公开(公告)日：2016-09-22

申请号：US14744786

申请日：2015-06-19

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Keith E. Fogel ,  Jeehwan Kim ,  Ning Li ,  Devendra K. Sadana

IPC分类号： H01L33/00 ,  H01L51/52 ,  H01L33/32 ,  H01L51/56 ,  H01L33/22 ,  H01L33/30

CPC分类号： H01L33/0095 ,  H01L33/22 ,  H01L51/52 ,  H01L51/5262 ,  H01L51/5275 ,  H01L51/56

摘要： A light emitting diode (LED) containing device including a light emitting diode (LED) structure, and a light transmissive substrate in contact with the LED structure. The light transmissive substrate has a texture surface tuned to include features with dimensions greater than a wavelength of light produced by the LED structure. In some embodiments, increasing the feature size of the texture to be comparable to the wavelength of light produced by the LED increases light extraction from the LED in comparison to when the feature size of the texture is substantially less or substantially larger than the wavelength of light.

摘要翻译： 一种包含发光二极管（LED）结构的发光二极管（LED）装置和与该LED结构接触的透光基板。 透光衬底具有被调整为包括尺寸大于由LED结构产生的光的波长的特征的纹理表面。 在一些实施例中，将纹理的特征尺寸增加为与由LED产生的光的波长相当的特征尺寸相比，当纹理的特征尺寸基本上小于或基本上大于光的波长时，从LED增加光提取 。