公开(公告)号：US20170250112A1

公开(公告)日：2017-08-31

申请号：US15055246

申请日：2016-02-26

申请人： Infineon Technologies AG

发明人： Stefan Barzen

IPC分类号： H01L21/768 ,  H01L21/24 ,  H01L23/48

CPC分类号： H01L21/76898 ,  H01L21/24 ,  H01L21/76838 ,  H01L23/481

摘要： A method for forming a semiconductor device comprises forming an insulation trench structure comprising insulation material extending into the semiconductor substrate from a surface of the semiconductor substrate. The insulation trench structure laterally surrounds a portion of the semiconductor substrate. The method further comprises modifying the laterally surrounded portion of the semiconductor substrate to form a vertical electrically conductive structure comprising an alloy material. The alloy material is an alloy of the semiconductor substrate material and at least one metal.

公开(公告)号：US20160359023A1

公开(公告)日：2016-12-08

申请号：US15237260

申请日：2016-08-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Stephen W. Bedell ,  Joel P. De Souza ,  Jeehwan Kim ,  Devendra K. Sadana

IPC分类号： H01L29/66 ,  H01L21/288 ,  H01L21/02 ,  H01L21/24 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/66795 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/228 ,  H01L21/24 ,  H01L21/26513 ,  H01L21/288 ,  H01L21/324 ,  H01L21/7624 ,  H01L21/76251 ,  H01L21/76283 ,  H01L29/1054 ,  H01L29/1604 ,  H01L29/161 ,  H01L29/775 ,  H01L29/7842 ,  H01L29/785 ,  H01L29/78684 ,  H01L29/78696

摘要： A layer of amorphous silicon is formed on a germanium-on-insulator substrate, or a layer of germanium is formed on a silicon-on-insulator substrate. An anneal is then performed which causes thermal mixing of silicon and germanium atoms within one of the aforementioned structures and subsequent formation of a silicon germanium-on-insulator material.

公开(公告)号：US09418870B2

公开(公告)日：2016-08-16

申请号：US14619326

申请日：2015-02-11

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Stephen W. Bedell ,  Joel P. De Souza ,  Jeehwan Kim ,  Devendra K. Sadana

IPC分类号： H01L29/786 ,  H01L21/324 ,  H01L29/16 ,  H01L29/161 ,  H01L21/762 ,  H01L29/775 ,  H01L29/78

CPC分类号： H01L29/66795 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/228 ,  H01L21/24 ,  H01L21/26513 ,  H01L21/288 ,  H01L21/324 ,  H01L21/7624 ,  H01L21/76251 ,  H01L21/76283 ,  H01L29/1054 ,  H01L29/1604 ,  H01L29/161 ,  H01L29/775 ,  H01L29/7842 ,  H01L29/785 ,  H01L29/78684 ,  H01L29/78696

摘要： A layer of amorphous silicon is formed on a germanium-on-insulator substrate, or a layer of germanium is formed on a silicon-on-insulator substrate. An anneal is then performed which causes thermal mixing of silicon and germanium atoms within one of the aforementioned structures and subsequent formation of a silicon germanium-on-insulator material.

摘要翻译： 在绝缘体上的锗基板上形成非晶硅层，或者在绝缘体上的硅衬底上形成锗层。 然后进行退火，其导致在上述结构之一内的硅和锗原子的热混合，随后形成绝缘体上硅锗材料。

公开(公告)号：US09401411B2

公开(公告)日：2016-07-26

申请号：US14802092

申请日：2015-07-17

申请人： FUJI ELECTRIC CO., LTD.

发明人： Fumikazu Imai

IPC分类号： H01L29/15 ,  H01L21/00 ,  H01L29/49 ,  H01L21/24 ,  H01L21/04 ,  H01L29/45 ,  H01L29/66 ,  H01L29/872 ,  H01L29/06 ,  H01L29/16

CPC分类号： H01L29/4975 ,  H01L21/0485 ,  H01L21/24 ,  H01L21/244 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/6606 ,  H01L29/872

摘要： In some aspects of the invention, a layer containing titanium and nickel is formed on an SiC substrate. A nickel silicide layer containing titanium carbide can be formed by heating. A carbon layer precipitated is removed by reverse sputtering. Thus, separation of an electrode of a metal layer formed on nickel silicide in a subsequent step is suppressed. The effect of preventing the separation can be further improved when the relation between the amount of precipitated carbon and the amount of carbon in titanium carbide in the surface of nickel silicide from which the carbon layer has not yet been removed satisfies a predetermined condition.

公开(公告)号：US20040029330A1

公开(公告)日：2004-02-12

申请号：US10634348

申请日：2003-08-04

发明人： Tahir Hussain ,  Miroslav Micovic ,  Paul Hashimoto ,  Gary Peng ,  Ara K. Kurdoghlian

IPC分类号： H01L021/338

CPC分类号： H01L29/66462 ,  H01L21/24 ,  H01L21/242 ,  H01L21/28587 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66924

摘要： A method for fabricating a semiconductor device which protects the ohmic metal contacts and the channel of the device during subsequent high temperature processing steps is explained. An encapsulation layer is used to cover the channel and ohmic metal contacts. The present invention provides a substrate on which a plurality of semiconductor layers are deposited. The semiconductor layers act as the channel of the device. The semiconductor layers are covered with an encapsulation layer. A portion of the encapsulation layer and the plurality of semiconductor layers are removed, wherein ohmic metal contacts are deposited. The ohmic metal contacts are then annealed to help reduce their resistance. The encapsulation layer ensures that the ohmic metal contacts do not migrate during the annealing step and that the channel is not harmed by the high temperatures needed during the annealing step.

摘要翻译： 说明了在随后的高温处理步骤中制造保护欧姆金属触点和器件通道的半导体器件的方法。 封装层用于覆盖通道和欧姆金属触点。 本发明提供一种其上沉积有多个半导体层的衬底。 半导体层用作器件的通道。 半导体层被封装层覆盖。 去除封装层和多个半导体层的一部分，其中沉积欧姆金属接触。 然后将欧姆金属触点退火以帮助降低它们的电阻。 封装层确保在退火步骤期间欧姆金属接触不迁移，并且该通道不会受退火步骤期间所需的高温的损害。

公开(公告)号：US4984037A

公开(公告)日：1991-01-08

申请号：US941478

申请日：1986-12-11

申请人： Brian M. Ditchek ,  Adrian I. Cogan ,  Enid K. Sichel ,  Walter L. Bloss, III

发明人： Brian M. Ditchek ,  Adrian I. Cogan ,  Enid K. Sichel ,  Walter L. Bloss, III

IPC分类号： H01L21/24 ,  H01L21/28 ,  H01L21/285 ,  H01L21/335 ,  H01L29/423 ,  H01L29/47 ,  H01L29/812 ,  H01L29/872

CPC分类号： H01L29/66416 ,  H01L21/24 ,  H01L21/28 ,  H01L21/28537 ,  H01L21/28581 ,  H01L29/42316 ,  H01L29/47 ,  H01L29/8122 ,  H01L29/872

摘要： A semiconductor device, specifically an FET, having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi.sub.2, disposed therein. The rods form Schottky barriers with the semiconductor material. A gate contact is made to several of the rods at one end, and source and drain contacts are made to the matrix of semicondcutor material. Current flow in the semiconductor material of the matrix between the source and the drain is controlled by applying biasing potential to the gate contact to enlarge the depletion zones around the rods.

摘要翻译： 一种半导体器件，特别是具有主体的半导体器件，其主体包括半导体材料的基体，特别是硅，其具有布置在其中的导电材料的单个棒阵列，特别是TaSi 2。 棒与半导体材料形成肖特基势垒。 在一端对多个杆进行栅极接触，并将源极和漏极触点制成半切割材料的基体。 通过向栅极接触施加偏置电位来控制源极和漏极之间的矩阵的半导体材料中的电流，以扩大绕组的耗尽区。

公开(公告)号：US4771010A

公开(公告)日：1988-09-13

申请号：US933666

申请日：1986-11-21

申请人： John E. Epler ,  Robert D. Burnham

发明人： John E. Epler ,  Robert D. Burnham

IPC分类号： H01S5/00 ,  H01L21/18 ,  H01L21/20 ,  H01L21/24 ,  H01L21/263 ,  H01L21/268 ,  H01S5/20 ,  H01S5/34 ,  H01S5/40 ,  H01L21/265

CPC分类号： H01S5/20 ,  H01L21/182 ,  H01L21/24 ,  H01L21/2636 ,  H01S5/2059 ,  H01S5/3428 ,  H01S5/4031

摘要： A novel energy beam induced layer disordering (EBILD) process is used to (a) locally melt in a scanned pattern regions of a solid state semiconductor heterostructure to produce an alloy of intermediate composition having different optical properties and/or (b) incorporating significantly large amounts of an impurity, present in an encapsulation surface layer of a solid state semiconductor heterostructure, into regions of the heterostructure via absorption of the impurity into liquid alloy melt to form regions having different optical and/or electrical properties and (c) thereafter optionally applying IID to enlarge or extend the disordered/as-grown boundaries of the initially melted region. As a direct write analogue to surface initiated impurity induced disordering (IID), EBILD is a flexible and viable process with high importance for continuous reproducibility and high yield in the fabrication of optoelectronic devices and thin film electronic and optoelectronic circuitry. Characterized in its simplest terms, the method of impurity incorporation contemplated by this invention provides such incorporation from a solid phase impurity source using an energy beam liquid phase technique to bring about absorption of the impurity with underlying constituents in a desired pattern to produce regions that may be disordered and possess different electrical properties or optical properties or both compared to regions not part of the scanned pattern.

摘要翻译： 使用新颖的能量束诱导层无序（EBILD）工艺来（a）在固态半导体异质结构的扫描图案区域中局部熔化，以产生具有不同光学性质的中间组分的合金和/或（b）结合显着大 存在于固态半导体异质结构的封装表面层中的杂质的量通过将杂质吸收到液态合金熔体中而形成具有不同光学和/或电特性的区域，并且（c）随后任选应用 IID以扩大或扩展初始熔化区域的无序/生长边界。 作为直接写入类似于表面引发的杂质诱导无序（IID）的方法，EBILD是一种灵活而可行的方法，对于光电子器件和薄膜电子和光电子电路的连续重现性和高产率具有重要意义。 特征在于其最简单的术语，本发明考虑的杂质掺入方法使用能量束液相技术从固相杂质源提供这种掺入，以使所需杂质与所需图案的底层组分吸收，从而产生可能 无序且具有不同的电性能或光学性质，或者与不是扫描图案的一部分的区域相比。

公开(公告)号：US4690714A

公开(公告)日：1987-09-01

申请号：US462374

申请日：1983-01-31

申请人： Chou H. Li

发明人： Chou H. Li

IPC分类号： C30B21/02 ,  C30B21/04 ,  H01L21/24 ,  H01L21/76 ,  H01L21/761 ,  H01L21/762 ,  H01L21/764 ,  H01L27/00 ,  H01L27/142 ,  H01L27/144 ,  H01L27/15 ,  H01L29/04 ,  H01L31/00 ,  H01L31/06 ,  H01L31/18 ,  H01L33/18 ,  H01L21/208

CPC分类号： H01L31/18 ,  C30B21/02 ,  C30B21/04 ,  H01L21/24 ,  H01L21/76 ,  H01L21/761 ,  H01L21/762 ,  H01L21/764 ,  H01L27/00 ,  H01L27/142 ,  H01L27/1446 ,  H01L27/156 ,  H01L29/04 ,  H01L31/00 ,  H01L31/06 ,  H01L33/18 ,  Y02E10/50 ,  Y10S438/929

摘要： A method of making an integrated electrooptic solid state device array comprising forming a structure having a multiplicity of active, solid state electrooptic component bodies in a solid state device material, including arranging the component bodies in a geometrical pattern and forming the component bodies to a prespecified size of less than 15 microns each and to an accuracy to within a fraction of a micron, and providing at least one electronic rectifying barrier at each of the component bodies for the operation of each component body as an active solid state electrooptic component.

摘要翻译： 一种制造集成电光固体器件阵列的方法，包括在固态器件材料中形成具有多个活性固态电光组分体的结构，包括以几何图案布置组分体并将组分体形成预定的 尺寸小于15微米，精度达到微米以下，并且在每个组分体上提供至少一个电子整流屏障，用于作为活性固体电光组分的每个组分体的操作。

公开(公告)号：US4519850A

公开(公告)日：1985-05-28

申请号：US524327

申请日：1983-08-18

申请人： Petra Kluge-Weiss

发明人： Petra Kluge-Weiss

IPC分类号： H01L23/473 ,  C30B13/02 ,  H01L21/225 ,  H01L21/24

CPC分类号： C30B13/02 ,  H01L21/24 ,  H01L2924/0002

摘要： In a process for the thermo-migration of liquid phases in a temperature gradient, which process starts from a metal coating (2) on a semiconducting substrate (1), the metal coating (2) is applied to a plane substrate surface (11), the temperature gradient is produced, in vacuo, by means of two flat faces (5, 6), which are parallel and can be heated uniformly, and is reversed by lowering the temperature of the warmer face and, at the same time, raising the temperature of the cooler face. The smooth temperature distribution leads to a reduction in the number of process steps, while at the same time yielding good results.

摘要翻译： 在温度梯度的液相热迁移过程中，该过程从半导体衬底（1）上的金属涂层（2）开始，将金属涂层（2）施加到平面衬底表面（11）上， ，在真空中通过两个平面（5,6）产生温度梯度，它们是平行的并且可被均匀地加热，并且通过降低较暖的面部的温度来反转，并且同时升高 冷却器表面的温度。 平滑的温度分布导致处理步骤数量的减少，同时产生良好的结果。

公开(公告)号：US4398974A

公开(公告)日：1983-08-16

申请号：US366900

申请日：1982-04-09

申请人： Kuen Chow ,  Jan Grinberg

发明人： Kuen Chow ,  Jan Grinberg

IPC分类号： C30B13/02 ,  H01L21/24 ,  H01L21/228

CPC分类号： C30B13/02 ,  H01L21/24

摘要： A process is provided for fabricating a semiconductor device by thermal gradient zone melting, whereby metal-rich droplets such as aluminum migrate through a semiconductor wafer such as silicon to create conductive paths. One surface of the wafer in provided with a buffer layer thereon, which is placed directly on a heating surface. The buffer layer terminates the migration of the droplets to prevent alloying of the droplets with the heating surface.

摘要翻译： 提供了一种用于通过热梯度区熔化制造半导体器件的方法，由此富含金属的液滴（例如铝）迁移穿过诸如硅的半导体晶片以产生导电路径。 晶片的一个表面在其上设置有缓冲层，其直接放置在加热表面上。 缓冲层终止液滴的迁移，以防止液滴与加热表面的合金化。