公开(公告)号：US20230246112A1

公开(公告)日：2023-08-03

申请号：US18156508

申请日：2023-01-19

申请人： CANON KABUSHIKI KAISHA

发明人： TATSURO UCHIDA

IPC分类号： H01L29/88 ,  H01L29/66

CPC分类号： H01L29/882 ,  H01L29/66219

摘要： A resonant tunneling diode includes a substrate, and a mesa structure including a compound semiconductor layer including a heterojunction comprising a multi-barrier structure disposed on the substrate, and an electrode disposed on the upper surface of the compound semiconductor layer. An outer edge portion of the compound semiconductor layer is a first region including crystal defects, and the first region and the electrode are set apart from each other.

公开(公告)号：US09923049B2

公开(公告)日：2018-03-20

申请号：US14988894

申请日：2016-01-06

申请人： FUJITSU LIMITED

发明人： Naoya Okamoto

IPC分类号： H01L29/04 ,  H01L29/205 ,  H01L29/88 ,  H01L29/778 ,  H01L21/8252 ,  H01L27/06 ,  H01L29/66 ,  H01L29/06 ,  H01L29/15 ,  H01L21/02 ,  H01L23/31 ,  H01L29/43 ,  H01L29/20

CPC分类号： H01L29/045 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/8252 ,  H01L23/3171 ,  H01L27/0605 ,  H01L27/0623 ,  H01L27/0629 ,  H01L29/0649 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/432 ,  H01L29/66219 ,  H01L29/7786 ,  H01L29/882 ,  H01L2924/0002 ,  H01L2924/00

摘要： A compound semiconductor device includes: a substrate; a first barrier layer of a nitride semiconductor formed over the substrate; a well layer of a nitride semiconductor formed over the first barrier layer; and a second barrier layer of a nitride semiconductor formed over the well layer, wherein the first barrier layer, the well layer, and the second barrier layer each include a first region having, as an upper surface, a (0001) plane in terms of crystal orientation and a second region having, as an upper surface, a (000-1) plane in terms of crystal orientation, the first region of the first barrier layer, the first region of the well layer, and the first region of the second barrier layer are stacked, the second region of the first barrier layer, the second region of the well layer, and the second region of the second barrier layer are stacked.

公开(公告)号：US09905637B2

公开(公告)日：2018-02-27

申请号：US15135148

申请日：2016-04-21

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Joel P. de Souza ,  Jeehwan Kim ,  Devendra K. Sadana ,  Brent A. Wacaser

IPC分类号： H01L33/00 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L29/201 ,  H01L29/267 ,  H01L29/08 ,  H01L29/10 ,  H01L29/207 ,  H01L29/24 ,  H01L29/26 ,  H01L29/861 ,  H01L29/22

CPC分类号： H01L29/267 ,  H01L29/0607 ,  H01L29/0634 ,  H01L29/0843 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/20 ,  H01L29/201 ,  H01L29/207 ,  H01L29/2206 ,  H01L29/227 ,  H01L29/24 ,  H01L29/263 ,  H01L29/66204 ,  H01L29/66219 ,  H01L29/66522 ,  H01L29/66969 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/861 ,  H01L29/8613

摘要： A semiconductor device includes a semiconductor substrate and a p-doped layer formed on the substrate having a dislocation density exceeding 108 cm−2. An n-type layer is formed on or in the p-doped layer. The n-type layer includes a II-VI material configured to tolerate the dislocation density to form an electronic device with reduced leakage current over a device with a III-V n-type layer.

公开(公告)号：US20160172449A1

公开(公告)日：2016-06-16

申请号：US14963825

申请日：2015-12-09

申请人： Kabushiki Kaisha Toshiba

发明人： Mariko SUZUKI ,  Tadashi SAKAI

IPC分类号： H01L29/16 ,  H01L29/20 ,  H01L29/167 ,  H01L29/868

CPC分类号： H01L29/1602 ,  H01L29/0817 ,  H01L29/155 ,  H01L29/167 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/452 ,  H01L29/6603 ,  H01L29/66219 ,  H01L29/7371 ,  H01L29/861 ,  H01L29/868

摘要： According to one embodiment, a semiconductor device includes an n-type semiconductor layer, a first electrode, and a nitride semiconductor layer. The n-type semiconductor layer includes diamond. The nitride semiconductor layer is provided between the n-type semiconductor layer and the first electrode. The nitride semiconductor layer includes AlxGa1-xN (0≦x≦1) and is of n-type.

摘要翻译： 根据一个实施例，半导体器件包括n型半导体层，第一电极和氮化物半导体层。 n型半导体层包括金刚石。 氮化物半导体层设置在n型半导体层和第一电极之间。 氮化物半导体层包括Al x Ga 1-x N（0＆nlE; x＆nlE; 1）并且是n型。

公开(公告)号：US09318562B2

公开(公告)日：2016-04-19

申请号：US13533033

申请日：2012-06-26

申请人： Tsuyoshi Takahashi

发明人： Tsuyoshi Takahashi

IPC分类号： H01L31/06 ,  H01L29/267 ,  H01L29/66 ,  H01L29/88

CPC分类号： H01L29/267 ,  H01L29/66219 ,  H01L29/882

摘要： A semiconductor apparatus includes: a semiconductor apparatus includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; and a third semiconductor layer of the first conductivity type, wherein: the second semiconductor layer is formed between the first and third semiconductor layers, and the first and second semiconductor layers are in contact with each other; and a first energy level at a bottom edge of a conduction band of the first semiconductor layer is lower than a second energy level at a top edge of a valence band of the second semiconductor layer, and the second energy level at the top edge of the valence band of the second semiconductor layer is substantially the same as a third energy level at a bottom edge of a conduction band of the third semiconductor layer.

摘要翻译： 半导体装置包括：半导体装置，包括：第一导电类型的第一半导体层; 第二导电类型的第二半导体层; 以及第一导电类型的第三半导体层，其中：所述第二半导体层形成在所述第一和第三半导体层之间，并且所述第一和第二半导体层彼此接触; 并且在第一半导体层的导带的底部边缘处的第一能级低于第二半导体层的价带的顶边缘处的第二能级，并且第二能级处于第 第二半导体层的价带基本上与第三半导体层的导带的底边缘处的第三能级相同。

公开(公告)号：US08785976B2

公开(公告)日：2014-07-22

申请号：US13639075

申请日：2011-06-21

申请人： Akira Nakajima ,  Sankara Narayanan Ekkanath Madathil ,  Yasunobu Sumida ,  Hiroji Kawai

发明人： Akira Nakajima ,  Sankara Narayanan Ekkanath Madathil ,  Yasunobu Sumida ,  Hiroji Kawai

IPC分类号： H01L29/78 ,  H01L29/423 ,  H01L29/06 ,  H01L29/861 ,  H01L29/10 ,  H01L29/40 ,  H01L29/778 ,  H01L29/66 ,  H01L29/20 ,  H01L29/872

CPC分类号： H01L29/78 ,  H01L29/0619 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/66219 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/861 ,  H01L29/872

摘要： A low-loss GaN-based semiconductor device is provided.The semiconductor device has the InzGa1-zN layer (where 0≦z

摘要翻译： 提供了一种低损耗GaN基半导体器件。 半导体器件具有InzGa1-zN层（其中0和nlE; z <1），Al x Ga 1-x N层（其中0

公开(公告)号：US20120223319A1

公开(公告)日：2012-09-06

申请号：US13040524

申请日：2011-03-04

申请人： Yuvaraj Dora

发明人： Yuvaraj Dora

IPC分类号： H01L29/20 ,  H01L29/778

CPC分类号： H01L29/872 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/475 ,  H01L29/66219 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/861

摘要： A diode is described with a III-N material structure, an electrically conductive channel in the III-N material structure, two terminals, wherein a first terminal is an anode adjacent to the III-N material structure and a second terminal is a cathode in ohmic contact with the electrically conductive channel, and a dielectric layer over at least a portion of the anode. The anode comprises a first metal layer adjacent to the III-N material structure, a second metal layer, and an intermediary electrically conductive structure between the first metal layer and the second metal layer. The intermediary electrically conductive structure reduces a shift in an on-voltage or reduces a shift in reverse bias current of the diode resulting from the inclusion of the dielectric layer. The diode can be a high voltage device and can have low reverse bias currents.

摘要翻译： 以III-N材料结构描述二极管，III-N材料结构中的导电通道，两个端子，其中第一端子是与III-N材料结构相邻的阳极，第二端子是阴极 与导电通道欧姆接触，以及在阳极的至少一部分上的电介质层。 阳极包括与III-N材料结构相邻的第一金属层，第二金属层和在第一金属层和第二金属层之间的中间导电结构。 中间导电结构减少了导通电压的偏移，或减少了由包含电介质层导致的二极管的反向偏置电流的偏移。 二极管可以是高电压器件，并且可以具有低反向偏置电流。

公开(公告)号：US20110186906A1

公开(公告)日：2011-08-04

申请号：US12993974

申请日：2009-05-27

申请人： Patrick Fay ,  Ning Su

发明人： Patrick Fay ,  Ning Su

IPC分类号： H01L29/88 ,  H01L21/329 ,  H01L21/205

CPC分类号： H01L29/205 ,  H01L29/365 ,  H01L29/66219 ,  H01L29/88 ,  H01L31/109

摘要： Example methods and apparatus for Antimonide-based backward diode millimeter-wave detectors are disclosed. A disclosed example backward diode includes a cathode layer adjacent to a first side of a non-uniform doping profile, and an Antimonide tunnel barrier layer adjacent to a second side of the spacer layer.

摘要翻译： 公开了用于基于蚂蚁的后向二极管毫米波检测器的示例方法和装置。 所公开的示例性后向二极管包括与非均匀掺杂分布的第一侧相邻的阴极层和与间隔层的第二侧相邻的锑锑钝化层阻挡层。

公开(公告)号：US07002175B1

公开(公告)日：2006-02-21

申请号：US10961355

申请日：2004-10-08

申请人： Jagar Singh ,  Yong Tian Hou ,  Ming Fu Li

发明人： Jagar Singh ,  Yong Tian Hou ,  Ming Fu Li

IPC分类号： H01L29/06

CPC分类号： H01L29/882 ,  B82Y10/00 ,  H01L29/66219

摘要： A double barrier resonant tunneling diode (RTD) is formed and integrated with a level of CMOS/BJT/SiGe devices and circuits through processes such as metal-to-metal thermocompressional bonding, anodic bonding, eutectic bonding, plasma bonding, silicon-to-silicon bonding, silicon dioxide bonding, silicon nitride bonding and polymer bonding or plasma bonding. The electrical connections are made using conducting interconnects aligned during the bonding process. The resulting circuitry has a three-dimensional architecture. The tunneling barrier layers of the RTD are formed of high-K dielectric materials such as SiO2, Si3N4, Al2O3, Y2O3, Ta2O5, TiO2, HfO2, Pr2O3, ZrO2, or their alloys and laminates, having higher band-gaps than the material forming the quantum well, which includes Si, Ge or SiGe. The inherently fast operational speed of the RTD, combined with the 3-D integrated architecture that reduces interconnect delays, will produce ultra-fast circuits with low noise characteristics.

摘要翻译： 通过金属对金属热压接合，阳极接合，共晶接合，等离子体接合，硅 - 二极管等工艺，形成双层势垒共振隧道二极管（RTD）并与CMOS / BJT / SiGe器件和电路集成， 硅键合，二氧化硅键合，氮化硅键合和聚合物键合或等离子体键合。 电连接使用在接合过程中对准的导电互连来制成。 所得到的电路具有三维结构。 RTD的隧道势垒层由高K电介质材料形成，例如SiO 2，Si 3 N 4 N 4，Al 2 O 3， 2个O 3，3个O 3，3个O 2，3个O 3， TiO 2，TiO 2，HfO 2，Pr 2 O 3，ZrO 2，N 2， >或其合金和层压体，具有比形成量子阱的材料（包括Si，Ge或SiGe）更高的带隙。 RTD的固有的快速操作速度与减少互连延迟的3-D集成架构相结合，将产生具有低噪声特性的超快速电路。

公开(公告)号：US20030160264A1

公开(公告)日：2003-08-28

申请号：US10217036

申请日：2002-08-13

申请人： FUJI XEROX CO., LTD.

发明人： Shigeru Yagi ,  Seiji Suzuki

IPC分类号： H01L031/0328 ,  H01L031/0336 ,  H01L031/072 ,  H01L031/109

CPC分类号： H01L29/66219 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/861

摘要： A hetero-junction semiconductor device is used as a diode in which a compound semiconductor layer at least contains one or more elements selected from group IIIA elements and one or more elements selected from group VA elements. The compound semiconductor layer is laminated on a surface of a heterogeneous semiconductor having a different conduction type from that of the compound semiconductor.

摘要翻译： 异质结半导体器件用作二极管，其中化合物半导体层至少包含选自IIIA族元素的一种或多种元素和选自组VA元素的一种或多种元素。 化合物半导体层层压在具有与化合物半导体不同的导电类型的非均相半导体的表面上。