Method of making resonant tunneling diodes and CMOS backend-process-compatible three dimensional (3-D) integration
    1.
    发明授权
    Method of making resonant tunneling diodes and CMOS backend-process-compatible three dimensional (3-D) integration 失效
    制造谐振隧道二极管和CMOS后端工艺兼容三维(3-D)集成的方法

    公开(公告)号:US07002175B1

    公开(公告)日:2006-02-21

    申请号:US10961355

    申请日:2004-10-08

    IPC分类号: H01L29/06

    摘要: A double barrier resonant tunneling diode (RTD) is formed and integrated with a level of CMOS/BJT/SiGe devices and circuits through processes such as metal-to-metal thermocompressional bonding, anodic bonding, eutectic bonding, plasma bonding, silicon-to-silicon bonding, silicon dioxide bonding, silicon nitride bonding and polymer bonding or plasma bonding. The electrical connections are made using conducting interconnects aligned during the bonding process. The resulting circuitry has a three-dimensional architecture. The tunneling barrier layers of the RTD are formed of high-K dielectric materials such as SiO2, Si3N4, Al2O3, Y2O3, Ta2O5, TiO2, HfO2, Pr2O3, ZrO2, or their alloys and laminates, having higher band-gaps than the material forming the quantum well, which includes Si, Ge or SiGe. The inherently fast operational speed of the RTD, combined with the 3-D integrated architecture that reduces interconnect delays, will produce ultra-fast circuits with low noise characteristics.

    摘要翻译: 通过金属对金属热压接合,阳极接合,共晶接合,等离子体接合,硅 - 二极管等工艺,形成双层势垒共振隧道二极管(RTD)并与CMOS / BJT / SiGe器件和电路集成, 硅键合,二氧化硅键合,氮化硅键合和聚合物键合或等离子体键合。 电连接使用在接合过程中对准的导电互连来制成。 所得到的电路具有三维结构。 RTD的隧道势垒层由高K电介质材料形成,例如SiO 2,Si 3 N 4 N 4,Al 2 O 3, 2个O 3,3个O 3,3个O 2,3个O 3, TiO 2,TiO 2,HfO 2,Pr 2 O 3,ZrO 2,N 2, >或其合金和层压体,具有比形成量子阱的材料(包括Si,Ge或SiGe)更高的带隙。 RTD的固有的快速操作速度与减少互连延迟的3-D集成架构相结合,将产生具有低噪声特性的超快速电路。