Method for growing a nitride compound semiconductor
    1.
    发明授权
    Method for growing a nitride compound semiconductor 有权
    生长氮化物半导体的方法

    公开(公告)号:US06413312B1

    公开(公告)日:2002-07-02

    申请号:US09476544

    申请日:2000-01-03

    Abstract: A new and improved method for growing a p-type nitride III-V compound semiconductor is provided which can produce a p-type nitride compound semiconductors having a high carrier concentration, without the need for annealing to activate impurities after growth. In a preferred embodiment, a p-type nitride compound semiconductor, such as p-type GaN, is grown by metal organic chemical vapor deposition methods using a nitrogen source material which does not release hydrogen during release of nitrogen and the semiconductor is grown in an inactive gas. The nitrogen source materials may be selected from nitrogen compounds that contain hydrogen radicals and alkyl radicals and/or phenyl radicals provided that the total amount of hydrogen radicals is less than or equal to the sum total of alkyl radicals and phenyl radicals present in the nitrogen compound used as the nitrogen source material.

    Abstract translation: 提供了一种用于生长p型氮化物III-V族化合物半导体的新型改进方法,其可以生产具有高载流子浓度的p型氮化物化合物半导体,而不需要退火以在生长后激活杂质。 在优选实施例中,p型氮化物半导体,例如p型GaN,通过金属有机化学气相沉积方法生长,使用在氮气释放期间不释放氢的氮源材料,并且半导体生长在 惰性气体 氮源材料可以选自含氢基团和烷基和/或苯基的氮化合物,条件是氢原子的总量小于或等于存在于氮化合物中的烷基和苯基的总和 用作氮源材料。

    Method and apparatus for vapor deposition
    2.
    发明授权
    Method and apparatus for vapor deposition 失效
    气相沉积的方法和装置

    公开(公告)号:US5200021A

    公开(公告)日:1993-04-06

    申请号:US267635

    申请日:1988-10-31

    CPC classification number: C23C16/52

    Abstract: A method for vapor deposition includes monitoring of growth of a semiconductor layer by way of in-situ monitoring. According to the invention, in-situ monitoring is performed by irradiating a light beam onto the surface of the growing layer in a direction nearly perpendicular to the surface. Growth parameters of the layer are detected by monitoring variation of the light reflected by the surface of the layer. A growth condition in a vapor deposition chamber is feedback controlled based on the detected growth parameter.

    Abstract translation: 一种用于气相沉积的方法包括通过原位监测来监测半导体层的生长。 根据本发明,通过在近似垂直于表面的方向上将光束照射到生长层的表面上来进行原位监测。 通过监测由该层的表面反射的光的变化来检测该层的生长参数。 基于检测到的生长参数反馈控制气相沉积室中的生长条件。

    Heterojunction bipolar transistor and the manufacturing method thereof
    3.
    发明授权
    Heterojunction bipolar transistor and the manufacturing method thereof 失效
    异质结双极晶体管及其制造方法

    公开(公告)号:US5140399A

    公开(公告)日:1992-08-18

    申请号:US675018

    申请日:1991-03-25

    Applicant: Hiroji Kawai

    Inventor: Hiroji Kawai

    CPC classification number: H01L29/7371 H01L27/0605

    Abstract: A heterojunction bipolar transistor formed as a collector top or emitter top type. This heterojunction bipolar transistor can operate at high speed and can be fabricated into a semiconductor integrated circuit with ease. The manufacturing method thereof is also disclosed.

    Abstract translation: 形成为集电极顶或发射极顶型的异质结双极晶体管。 该异质结双极晶体管可以高速工作,并且可以容易地制造成半导体集成电路。 还公开了其制造方法。

    Junction field effect transistor with vertical gate region
    5.
    发明授权
    Junction field effect transistor with vertical gate region 失效
    具有垂直栅极区域的结型场效应晶体管

    公开(公告)号:US4916499A

    公开(公告)日:1990-04-10

    申请号:US405082

    申请日:1989-09-06

    Applicant: Hiroji Kawai

    Inventor: Hiroji Kawai

    CPC classification number: H01L29/8083

    Abstract: A junction field effect transistor having a source region, a gate region and a drain region, which are laminated to form a laminated layer, and a channel region formed on one side surface across the laminated layer, and also having a cavity which separates high impurity concentration regions of the source, gate and drain regions is disclosed. A method for manufacturing the above junction field effect transistor is also disclosed which has the steps of laminating semiconductor layers which become a source region, a gate region and a drain region, respectively, removing portions of the semiconductor layers other than portions which become an active region portion, and forming a channel region on one side surface across the laminated layers of the source region, gate region and drain region by the epitaxial growth method, and also forming cavities.

    Abstract translation: 具有层叠以形成层叠层的源极区域,栅极区域和漏极区域的结型场效应晶体管和形成在层叠层的一个侧面上的沟道区域,并且还具有分离高杂质的空穴 公开了源极,栅极和漏极区域的集中区域。 还公开了用于制造上述结型场效应晶体管的方法,其具有以下步骤:分别成为源极区,栅极区和漏极区的半导体层,去除部分成为活性的部分之外的半导体层的部分 并且通过外延生长方法在源极区域,栅极区域和漏极区域的层叠层的一个侧表面上形成沟道区域,并且还形成空腔。

    Heterojunctional collector-top type bi-polar transistor
    6.
    发明授权
    Heterojunctional collector-top type bi-polar transistor 失效
    异双功能集电极 - 顶型双极晶体管

    公开(公告)号:US4903104A

    公开(公告)日:1990-02-20

    申请号:US376904

    申请日:1989-07-05

    CPC classification number: H01L29/7371

    Abstract: A heterojunction type bi-polar transistor which has a heterojunction in the boundary between an intrinsic base region and an external base region to thereby eliminate the periphery effect and accordingly obtain a high current amplification factor.

    Abstract translation: 一种异质结型双极晶体管,其在本征基极区域和外部基极区域之间的边界具有异质结,从而消除周边效应,从而获得高电流放大系数。

    Semiconductor device
    7.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号:US4758870A

    公开(公告)日:1988-07-19

    申请号:US713636

    申请日:1985-03-19

    CPC classification number: H01L29/205 H01L29/7606

    Abstract: A III-V semiconductor device is disclosed, which includes an emitter region, an emitter barrier region having such a barrier height as to substantially restrict a thermionic emission current as compared with a tunneling current and such a barrier width as to permit the tunneling current, a base region containing indium and having higher electron affinity than said emitter region and a collector barrier region having such a barrier height as to substantially prohibit a thermally distributed electron from overflowing and such a barrier width as to substantially prohibit the tunneling current.

    Abstract translation: 公开了一种III-V半导体器件,其包括发射极区域,具有这样的势垒高度的发射极阻挡区域,其与隧道电流相比基本上限制热离子发​​射电流,并且具有允许隧穿电流的这种势垒宽度, 包含铟并且具有比所述发射极区域更高的电子亲和力的基极区域和具有这样的势垒高度的集电极势垒区域,以便基本上禁止热分布电子溢出,并且这种势垒宽度基本上禁止隧穿电流。

    Electrodeposition process
    8.
    发明授权
    Electrodeposition process 失效
    电沉积工艺

    公开(公告)号:US4016052A

    公开(公告)日:1977-04-05

    申请号:US632808

    申请日:1975-11-17

    CPC classification number: C25C3/00 C25C3/28

    Abstract: In an electrodeposition process using a fused-salt electrolyte in which a desired metal or alloy deposited by electrolysis can be dissolved, and/or using a fused-salt electrolyte from which a highly viscous material is produced on the surface of an electrodeposited metal or alloy upon electrodeposition of the desired metal or alloy, solid particles are dispersed in the aforesaid electrolyte in order to obtain a flat surface of the desired electrodeposited metal or alloy, whereby continuous electrodeposition can be carried out.

    Abstract translation: 在使用熔解盐电解质的电沉积工艺中,其中可以溶解通过电解沉积的所需金属或合金,和/或使用在电沉积金属或合金的表面上产生高粘度材料的熔融盐电解质 在电沉积所需的金属或合金时,将固体颗粒分散在上述电解质中以获得所需电沉积金属或合金的平坦表面,由此可以进行连续的电沉积。

    Semiconductor light emitting device
    9.
    发明授权
    Semiconductor light emitting device 有权
    半导体发光器件

    公开(公告)号:US06362016B1

    公开(公告)日:2002-03-26

    申请号:US09557770

    申请日:2000-04-25

    CPC classification number: H01L33/32

    Abstract: A luminous intensity of a semiconductor light emitting device having a multi-layer structure formed of nitride group III-V compound semiconductors is improved by having a thickness d of a light emitting layer (active layer) of the semiconductor light emitting device having a multi-layer structure of nitride group III-V compound semiconductors ranging from 0.3 nm to 1.5 nm.

    Abstract translation: 具有由氮化物III-V族化合物半导体形成的多层结构的半导体发光器件的发光强度通过使半导体发光器件的发光层(有源层)的厚度d具有多层结构, 氮化物III-V族化合物半导体的层结构为0.3nm至1.5nm。

    Semiconductor light emitting device
    10.
    发明授权
    Semiconductor light emitting device 失效
    半导体发光器件

    公开(公告)号:US6121636A

    公开(公告)日:2000-09-19

    申请号:US72177

    申请日:1998-05-05

    Abstract: A semiconductor light emitting device is provided, which does not deteriorate in luminance, maintains a high reliability, permits more free choice of an adhesive, and promises effective extraction of light to the exterior even when it is bonded to a lead frame or other support with the adhesive in practical use. In a GaN light emitting diode, GaN compound semiconductor layers are stacked sequentially on a front surface of a sapphire substrate to form a light emitting diode structure, and a reflective film is formed on a rear surface. Alternatively, the GaN compound semiconductor layers forming the light emitting diode structure are selectively removed by etching to define an inverted mesa-shaped end surface, and the reflective film is formed on the end surface. Both the p-side electrode and the n-side electrode are formed on a common side of the substrate where the GaN compound semiconductor layers are formed.

    Abstract translation: 提供一种半导体发光器件,其不会劣化亮度,保持高可靠性,允许更自由地选择粘合剂,并且即使当将其粘合到引线框架或其他支撑件上时也能有效地将光提取到外部, 粘合剂在实际使用中。 在GaN发光二极管中,GaN化合物半导体层依次层叠在蓝宝石衬底的前表面上以形成发光二极管结构,并且在后表面上形成反射膜。 或者,通过蚀刻选择性地除去形成发光二极管结构的GaN化合物半导体层,以限定倒置的台面状端面,并且在端面上形成反射膜。 p侧电极和n侧电极都形成在形成GaN化合物半导体层的基板的共同侧。

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