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    METHOD OF MAKING A SEMICONDUCTOR DEVICE INCLUDING AN ALL AROUND GATE
    63.
    发明申请
    METHOD OF MAKING A SEMICONDUCTOR DEVICE INCLUDING AN ALL AROUND GATE 有权
    制造包括所有边界的半导体器件的方法

    公开(公告)号：US20140357036A1

    公开(公告)日：2014-12-04

    申请号：US13906702

    申请日：2013-05-31

    申请人： STMICROELECTRONICS, INC. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Nicolas Loubet ,  Prasanna Khare ,  Huiming Bu

    IPC分类号： H01L29/66

    CPC分类号： H01L29/66484 ,  H01L21/823481 ,  H01L27/1211 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/785

    摘要： A method of making a semiconductor device includes forming an intermediate structure including second semiconductor fin portions above a first semiconductor layer, and top first semiconductor fin portions extending from respective ones of the second semiconductor fin portions. The second semiconductor fin portions are selectively etchable with respect to the top first semiconductor fin portions. A dummy gate is on the intermediate structure. The second semiconductor fin portions are selectively etched to define bottom openings under respective ones of the top first semiconductor fin portions. The bottom openings are filled with a dielectric material.

    摘要翻译： 制造半导体器件的方法包括在第一半导体层之上形成包括第二半导体鳍部的中间结构以及从第二半导体鳍部中的相应半导体鳍部延伸的顶部第一半导体鳍部。 第二半导体鳍片部分相对于顶部第一半导体鳍片部分可选择性地蚀刻。 虚拟门在中间结构上。 选择性地蚀刻第二半导体鳍片部分以在顶部第一半导体鳍片部分的相应一个下限定底部开口。 底部开口填充有电介质材料。

    SILICON-ON-NOTHING TRANSISTOR SEMICONDUCTOR STRUCTURE WITH CHANNEL EPITAXIAL SILICON-GERMANIUM REGION
    64.
    发明申请
    SILICON-ON-NOTHING TRANSISTOR SEMICONDUCTOR STRUCTURE WITH CHANNEL EPITAXIAL SILICON-GERMANIUM REGION 有权
    具有通道外延硅 - 锗原子的无硅晶体管半导体结构

    公开(公告)号：US20140353718A1

    公开(公告)日：2014-12-04

    申请号：US13907460

    申请日：2013-05-31

    申请人： STMicroelectronics, Inc. ,  International Business Machines Corporation

    发明人： Nicolas Loubet ,  Qing Liu ,  Prasanna Khare ,  Stephane Allegret-Maret ,  Bruce Doris ,  Kangguo Cheng

    IPC分类号： H01L29/786 ,  H01L27/092 ,  H01L27/11 ,  H01L29/66

    CPC分类号： H01L29/66772 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/84 ,  H01L27/092 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/78654

    摘要： An improved transistor with channel epitaxial silicon and methods for fabrication thereof. In one aspect, a method for fabricating a transistor includes: forming a gate stack structure on an epitaxial silicon region, a width dimension of the epitaxial silicon region approximating a width dimension of the gate stack structure; encapsulating the epitaxial silicon region under the gate stack structure with sacrificial spacers formed on both sides of the gate stack structure and the epitaxial silicon region; forming a channel of the transistor having a width dimension that approximates that of the epitaxial silicon region and the gate stack structure, the epitaxial silicon region and the gate stack structure formed on the channel of the transistor; removing the sacrificial spacers; and growing a raised epitaxial source and drain from the silicon substrate, with portions of the raised epitaxial source and drain in contact with the epitaxial silicon region.

    摘要翻译： 一种具有沟道外延硅的改进的晶体管及其制造方法。 一方面，一种用于制造晶体管的方法包括：在外延硅区域上形成栅极叠层结构，外延硅区域的宽度尺寸近似于栅极堆叠结构的宽度尺寸; 将所述外延硅区域封装在所述栅极堆叠结构之下，并且在所述栅极堆叠结构和所述外延硅区域的两侧上形成牺牲间隔物; 形成晶体管的沟道，其宽度尺寸近似于形成在晶体管的沟道上的外延硅区域和栅极堆叠结构，外延硅区域和栅极堆叠结构; 去除牺牲隔离物; 并且从硅衬底生长隆起的外延源和漏极，其中凸起的外延源和漏极的一部分与外延硅区接触。