公开(公告)号：US20150194408A1

公开(公告)日：2015-07-09

申请号：US14663754

申请日：2015-03-20

申请人： International Business Machines Corporation

发明人： Peter A. Gruber ,  Paul A. Lauro ,  Jae-Woong Nah

IPC分类号： H01L23/00 ,  H01L21/56

CPC分类号： H05K3/3436 ,  B23K1/0016 ,  B23K3/0638 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/11011 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81065 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/14 ,  H01L2924/20104 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/35 ,  H05K3/3494 ,  H05K13/0465 ,  H05K2203/043 ,  H01L2924/00014 ,  H01L2924/014

摘要： Multiple injections of molten solder are employed to form double solder bumps having outer layers that melt at lower temperatures than the inner portions thereof. During a flip chip assembly process, the reflow temperature is above the melting temperature of the outer layers and below the melting temperature of the inner portions of the solder bumps. As the inner portions of the solder bumps do not collapse during reflow, a flip chip assembly can be made at relatively low temperatures and have a high stand-off height. A structure having double solder bumps facilitates flip chip assembly.

摘要翻译： 采用多次注入熔融焊料来形成双层焊料凸点，其外层在比其内部部分更低的温度下熔化。 在倒装芯片组装过程中，回流温度高于外层的熔化温度并低于焊料凸块的内部部分的熔化温度。 由于焊料凸块的内部在回流期间不会塌陷，所以可以在相对低的温度下制造倒装芯片组件并具有高的间隔高度。 具有双重焊料凸块的结构有助于倒装芯片组装。

公开(公告)号：US08987132B2

公开(公告)日：2015-03-24

申请号：US14467564

申请日：2014-08-25

申请人： International Business Machines Corporation

发明人： Peter A. Gruber ,  Paul A. Lauro ,  Jae-Woong Nah

IPC分类号： H01L21/00 ,  H01L23/00

CPC分类号： H05K3/3436 ,  B23K1/0016 ,  B23K3/0638 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/11011 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81065 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/14 ,  H01L2924/20104 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/35 ,  H05K3/3494 ,  H05K13/0465 ,  H05K2203/043 ,  H01L2924/00014 ,  H01L2924/014

摘要： Multiple injections of molten solder are employed to form double solder bumps having outer layers that melt at lower temperatures than the inner portions thereof. During a flip chip assembly process, the reflow temperature is above the melting temperature of the outer layers and below the melting temperature of the inner portions of the solder bumps. As the inner portions of the solder bumps do not collapse during reflow, a flip chip assembly can be made at relatively low temperatures and have a high stand-off height. A structure having double solder bumps facilitates flip chip assembly.

公开(公告)号：US20150069115A1

公开(公告)日：2015-03-12

申请号：US14387380

申请日：2012-05-30

申请人： Bernhard Rebhan

发明人： Bernhard Rebhan

IPC分类号： H01L23/00 ,  B23K20/14 ,  B23K20/26 ,  B23K20/24 ,  B23K37/00 ,  B23K31/02

CPC分类号： H01L24/75 ,  B23K20/14 ,  B23K20/24 ,  B23K20/26 ,  B23K31/02 ,  B23K37/00 ,  H01L21/67092 ,  H01L2224/751 ,  H01L2224/7525 ,  H01L2224/757 ,  H01L2224/758 ,  H01L2224/81065 ,  H01L2224/83065 ,  H01L2224/94 ,  H01L2924/1461 ,  H01L2224/81 ,  H01L2924/00

摘要： A device for bonding of one bond side of a first substrate to one bond side of a second substrate, the device having one module group with a common working space which can be closed especially gastight to the environment, at least one bond module is connected in a sealed manner to the working space, and a movement apparatus for moving the first and second substrate in the working space,The module group has a reduction module which is connected, in a sealed manner to the working space for reducing the bond sides.

摘要翻译： 一种用于将第一衬底的一个接合侧粘合到第二衬底的一个接合侧的装置，所述设备具有一个具有可以被封闭的公共工作空间的模块组，所述工作空间可以特别气密地环绕到环境中，至少一个接合模块连接在 与工作空间密封的方式，以及用于在工作空间中移动第一和第二基板的移动装置。模块组具有以与密封的方式连接到用于减少接合侧的工作空间的还原模块。

公开(公告)号：US08901751B2

公开(公告)日：2014-12-02

申请号：US13632268

申请日：2012-10-01

申请人： Fujitsu Limited

发明人： Kozo Shimizu ,  Seiki Sakuyama ,  Toshiya Akamatsu

IPC分类号： H01L23/498 ,  H01L25/065 ,  H01L23/00 ,  H01L21/50 ,  H01L23/538 ,  H01L23/31

CPC分类号： H01L24/81 ,  H01L21/50 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L23/5383 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16506 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81002 ,  H01L2224/81065 ,  H01L2224/81075 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/8142 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81457 ,  H01L2224/81464 ,  H01L2224/81469 ,  H01L2224/81805 ,  H01L2224/81893 ,  H01L2224/81931 ,  H01L2224/83815 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01083

摘要： A semiconductor device, includes: a connection member including a first pad formed on a principal surface thereof; a semiconductor chip including a circuit-formed surface on which a second pad is formed, the chip mounted on the connection member so that the circuit-formed surface faces the principal surface; and a solder bump that connects the first and second pads and is made of metal containing Bi and Sn, wherein the bump includes a first interface-layer formed adjacent to the second pad, a second interface-layer formed adjacent to the first pad, a first intermediate region formed adjacent to either one of the interface-layers, and a second intermediate region formed adjacent to the other one of the interface-layers and formed adjacent to the first intermediate region; Bi-concentration in the first intermediate region is higher than a Sn-concentration; and a Sn-concentration in the second intermediate region is higher than a Bi-concentration.

摘要翻译： 一种半导体器件，包括：连接构件，包括形成在其主表面上的第一焊盘; 半导体芯片，其包括形成有第二焊盘的电路形成表面，所述芯片安装在所述连接构件上，使得所述电路形成表面面向所述主表面; 以及焊料凸块，其连接所述第一和第二焊盘，并且由含有Bi和Sn的金属制成，其中所述凸块包括邻近所述第二焊盘形成的第一界面层，邻近所述第一焊盘形成的第二界面层， 形成在与所述界面层中的任一个相邻的第一中间区域和与所述界面层中的另一个相邻地形成并与所述第一中间区域相邻形成的第二中间区域; 第一中间区域的双浓度高于Sn-浓度; 并且第二中间区域中的Sn浓度高于Bi浓度。

公开(公告)号：US20130087912A1

公开(公告)日：2013-04-11

申请号：US13632268

申请日：2012-10-01

申请人： FUJITSU LIMITED

发明人： Kozo SHIMIZU ,  Seiki SAKUYAMA ,  Toshiya AKAMATSU

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L24/81 ,  H01L21/50 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L23/5383 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16506 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81002 ,  H01L2224/81065 ,  H01L2224/81075 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/8142 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81457 ,  H01L2224/81464 ,  H01L2224/81469 ,  H01L2224/81805 ,  H01L2224/81893 ,  H01L2224/81931 ,  H01L2224/83815 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01083

摘要： A semiconductor device, includes: a connection member including a first pad formed on a principal surface thereof; a semiconductor chip including a circuit-formed surface on witch a second pad is formed, the chip mounted on the connection member so that the circuit-formed surface faces the principal surface; and a solder bump that connects the first and second pads and is made of metal containing Bi and Sn, wherein the bump includes a first interface-layer formed adjacent to the second pad, a second interface-layer formed adjacent to the first pad, a first intermediate region formed adjacent to either one of the interface-layers, and a second intermediate region formed adjacent to the other one of the interface-layers and formed adjacent to the first intermediate region; Bi-concentration in the first intermediate region is higher than a Sn-concentration; and a Sn-concentration in the second intermediate region is higher than a Bi-concentration.

摘要翻译： 一种半导体器件，包括：连接构件，包括形成在其主表面上的第一焊盘; 形成包括第二衬垫的电路形成表面的半导体芯片，所述芯片安装在所述连接构件上，使得所述电路形成表面面向所述主表面; 以及焊料凸块，其连接所述第一和第二焊盘，并且由含有Bi和Sn的金属制成，其中所述凸块包括邻近所述第二焊盘形成的第一界面层，邻近所述第一焊盘形成的第二界面层， 形成在与所述界面层中的任一个邻接的第一中间区域和与所述界面层中的另一个相邻地形成并与所述第一中间区域相邻形成的第二中间区域; 第一中间区域的双浓度高于Sn-浓度; 并且第二中间区域中的Sn浓度高于Bi浓度。

公开(公告)号：US20120193752A1

公开(公告)日：2012-08-02

申请号：US13016994

申请日：2011-01-29

申请人： Sampath Purushothaman ,  Roy Rongqing Yu

发明人： Sampath Purushothaman ,  Roy Rongqing Yu

IPC分类号： H01L27/12 ,  H01L21/60

CPC分类号： H01L21/76897 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/76251 ,  H01L21/76256 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/7684 ,  H01L21/76879 ,  H01L21/76898 ,  H01L21/84 ,  H01L23/5226 ,  H01L23/544 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/89 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0649 ,  H01L2221/68372 ,  H01L2223/54426 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/11002 ,  H01L2224/1148 ,  H01L2224/11616 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2224/8013 ,  H01L2224/81005 ,  H01L2224/81065 ,  H01L2224/81075 ,  H01L2224/8109 ,  H01L2224/81093 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81209 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A process and resultant article of manufacture made by such process comprises forming through vias needed to connect a bottom device layer in a bottom silicon wafer to the one in the top device layer in a top silicon wafer comprising a silicon-on-insulator (SOI) wafer. Through vias are disposed in such a way that they extend from the middle of the line (MOL) interconnect of the top wafer to the buried oxide (BOX) layer of the SOI wafer with appropriate insulation provided to isolate them from the SOI device layer.

摘要翻译： 通过这种方法制造的工艺和最终的制品包括将包含硅绝缘体（SOI）的顶部硅晶片中的将底部硅晶片中的底部器件层连接到顶部器件层中的底部器件层所需的通孔形成， 晶圆。 通孔以这样的方式设置，使得它们从顶部晶片的线（MOL）互连的中间延伸到SOI晶片的掩埋氧化物（BOX）层，其中提供了适当的绝缘以将它们与SOI器件层隔离开。

公开(公告)号：US08191758B2

公开(公告)日：2012-06-05

申请号：US12815693

申请日：2010-06-15

申请人： Kanako Sawada ,  Hideo Aoki ,  Naoyuki Komuta ,  Koji Ogiso

发明人： Kanako Sawada ,  Hideo Aoki ,  Naoyuki Komuta ,  Koji Ogiso

IPC分类号： B23K31/02 ,  H01L21/44 ,  H05K3/00

CPC分类号： B23K1/008 ,  B23K1/0016 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/056 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/81065 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/81986 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  Y10T29/49144 ,  Y10T29/49149 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/05099

摘要： In one embodiment, a first substrate having first solder bumps and a second substrate having second solder bumps are stacked while temporarily tacking the solder bumps to each other, and then a stack is disposed inside a furnace. The gas in the furnace is exhausted to be in a reduced pressure atmosphere, and then a carboxylic acid gas is introduced into the furnace. While increasing a temperature inside the furnace where the carboxylic acid gas is introduced, the gas in the furnace is exhausted to be in a reduced pressure atmosphere at a temperature in a range from a reduction temperature of oxide films by the carboxylic acid gas to lower than a melting temperature of the solder bumps. By increasing the temperature inside the furnace up to a temperature in a range of the melting temperature of the solder bumps and higher, the first solder bumps and the second solder bumps are melted and joined.

摘要翻译： 在一个实施例中，堆叠具有第一焊料凸块的第一基板和具有第二焊料凸块的第二基板，同时临时将焊料凸块彼此粘贴，然后将堆叠设置在炉内。 将炉内的气体排出到减压气氛中，然后将羧酸气体引入炉中。 在提高引入了羧酸气体的炉内的温度的同时，将炉内的气体在由氧化物膜的还原温度通过羧酸气体降低至低于室温的温度下排出到减压气氛中 焊料凸块的熔化温度。 通过将炉内的温度升高到焊锡凸块的熔融温度范围内的温度，使第一焊料凸块和第二焊料凸点熔化并接合。

公开(公告)号：US20110076801A1

公开(公告)日：2011-03-31

申请号：US12882673

申请日：2010-09-15

申请人： Hideo Aoki ,  Masatoshi Fukuda ,  Kanako Sawada ,  Yasuhiro Koshio

发明人： Hideo Aoki ,  Masatoshi Fukuda ,  Kanako Sawada ,  Yasuhiro Koshio

IPC分类号： H01L21/60

CPC分类号： H01L24/81 ,  H01L24/13 ,  H01L24/16 ,  H01L24/75 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/7592 ,  H01L2224/81065 ,  H01L2224/81093 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81208 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/00

摘要： According to a manufacturing method of one embodiment, a first solder bump and a second solder bump are aligned and placed in contact with each other, and thereafter, the first and second solder bumps are heated to a temperature equal or higher than a melting point of the solder bumps and melted, whereby a partially connection body of the first solder bump and the second solder bump is formed. The partially connection body is cooled. The cooled partially connection body is heated to a temperature equal to or higher than the melting point of the solder bump in a reducing atmosphere, thereby to form a permanent connection body by melting the partially connection body while removing an oxide film existing on a surface of the partially connection body.

摘要翻译： 根据一个实施例的制造方法，将第一焊料凸块和第二焊料凸块对齐并且彼此接触放置，然后将第一和第二焊料凸块加热至等于或高于 焊料凸起并熔化，由此形成第一焊料凸块和第二焊料凸块的部分连接体。 部分连接体被冷却。 冷却的部分连接体在还原气氛中被加热到等于或高于焊料凸点的熔点的温度，从而通过熔化部分连接体而形成永久性连接体，同时除去存在于表面上的氧化膜 部分连接体。

公开(公告)号：US20110074018A1

公开(公告)日：2011-03-31

申请号：US12887772

申请日：2010-09-22

申请人： Masatoshi Fukuda

发明人： Masatoshi Fukuda

IPC分类号： H01L21/56 ,  H01L25/11

CPC分类号： H01L24/81 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/562 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/731 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81007 ,  H01L2224/81065 ,  H01L2224/81097 ,  H01L2224/81194 ,  H01L2224/81815 ,  H01L2224/9212 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a method of manufacturing a semiconductor device is disclosed. The method includes forming a cured film of an insulation resin on a surface of a first semiconductor chip and flip-chip bonding a second semiconductor via a bump on the first semiconductor chip on which the cured film of the insulation resin is formed. The insulation resin can be cured at temperature range from (A−50)° C. to (A+50)° C., wherein “A” is a solidification point of the bump.

摘要翻译： 在一个实施例中，公开了制造半导体器件的方法。 该方法包括在第一半导体芯片的表面上形成绝缘树脂的固化膜，并且在其上形成有绝缘树脂的固化膜的第一半导体芯片上经由凸块将第二半导体结合到第二半导体。 绝缘树脂可以在（A-50）℃至（A + 50）℃的温度范围内固化，其中“A”是凸点的凝固点。

公开(公告)号：US20090302469A1

公开(公告)日：2009-12-10

申请号：US12256333

申请日：2008-10-22

申请人： Naomi MASUDA ,  Masataka HOSHINO ,  Ryota FUKUYAMA

发明人： Naomi MASUDA ,  Masataka HOSHINO ,  Ryota FUKUYAMA

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L24/81 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16105 ,  H01L2224/75252 ,  H01L2224/81054 ,  H01L2224/81065 ,  H01L2224/81191 ,  H01L2224/812 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/83907 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A semiconductor device which includes a first semiconductor chip 10, a first electrode 12 formed on the first semiconductor chip 10, a second semiconductor chip 20 to which the first semiconductor chip 10 is mounted, a second electrode 22 with a protrusion 24, which is formed on the second semiconductor chip 20, and a solder bump 14 which bonds the first electrode 12 and the second electrode 22 to cover at least a part of a side surface of the protrusion 24, and a method for manufacturing thereof are provided.

摘要翻译： 一种半导体器件，包括第一半导体芯片10，形成在第一半导体芯片10上的第一电极12，安装有第一半导体芯片10的第二半导体芯片20，形成有突起24的第二电极22，其形成 以及与第一电极12和第二电极22接合以覆盖突起24的侧面的至少一部分的焊料凸点14及其制造方法。