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    PORTABLE COMMUNICATION DEVICE SUPPORTING MULTIPLE WIRELESS COMMUNICATION PROTOCOLS
    23.
    发明申请
    PORTABLE COMMUNICATION DEVICE SUPPORTING MULTIPLE WIRELESS COMMUNICATION PROTOCOLS 审中-公开

    公开(公告)号：US20200252090A1

    公开(公告)日：2020-08-06

    申请号：US16777235

    申请日：2020-01-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hoyoung IM ,  Jeongheum Lee ,  Sungchul Park

    IPC: H04B1/00 ,  H04W88/06

    Abstract: A portable communication device is Provided for supporting multiple different communication networks. The portable communication device includes an antenna configured to receive a first signal of a first frequency band corresponding to a first cellular network, and a second signal of a second frequency band corresponding to a second cellular network; a first communication circuit electrically connected to the antenna and corresponding to the first cellular network; a second communication circuit electrically connected to the antenna and corresponding to the second cellular network; a distributor configured to electrically connect the antenna to the first communication circuit and the second communication circuit; a first low noise amplifier (LNA) connected between the distributor and the first communication circuit; and a second LNA connected between the distributor and the second communication circuit. While one of the first communication circuit and the second communication circuit is not driven, the other communication circuit is configured to be driven.

    Antenna and electronic device comprising same
    28.
    发明授权
    Antenna and electronic device comprising same 有权

    公开(公告)号：US12300876B2

    公开(公告)日：2025-05-13

    申请号：US17880063

    申请日：2022-08-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungchul Park ,  Wonjoon Choi

    IPC: H01Q3/26 ,  H01Q1/24

    Abstract: According to various embodiments, an electronic device includes a front cover; a rear cover facing away from the front cover; a side frame surrounding a space between the front cover and the rear cover and at least partially includes a first conductive portion; a first array antenna includes a first substrate disposed in the space and a plurality of first antenna elements disposed on the first substrate and configured to form a beam pattern toward the first conductive portion; and a wireless communication circuit configured to transmit and/or receive, via the first array antenna, a wireless signal in a first frequency range. The first conductive portion includes, in a portion corresponding to the first array antenna, a plurality of first slits provided to be spaced apart from each other and to have a length in a first direction perpendicular to a polarization of the first array antenna.

    Semiconductor memory devices and methods of operating semiconductor memory devices
    29.
    发明授权
    Semiconductor memory devices and methods of operating semiconductor memory devices 有权

    公开(公告)号：US12148494B2

    公开(公告)日：2024-11-19

    申请号：US18115132

    申请日：2023-02-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kiheung Kim ,  Sanguhn Cha ,  Junhyung Kim ,  Sungchul Park ,  Hyojin Jung ,  Kyung-Soo Ha

    IPC: G11C29/42 ,  G11C11/406 ,  G11C29/20 ,  G11C29/44

    Abstract: A semiconductor memory device includes a memory cell array, an error correction code (ECC) circuit, a fault address register, a scrubbing control circuit and a control logic circuit. The memory cell array includes memory cell rows. The scrubbing control circuit generates scrubbing addresses based on refresh operations performed on the memory cell array. The control logic circuit controls the ECC circuit such that the ECC circuit performs an error detection operation on a plurality of sub-pages in a first memory cell row to count a number of error occurrences, and determines whether to correct a codeword in which an error is detected based on the number of error occurrences. An uncorrected or corrected codeword is written back, and a row address of the first memory cell row may be stored in the fault address register as a row fault address based on the number of error occurrences.

    Semiconductor memory devices and methods of operating semiconductor memory devices
    30.
    发明授权
    Semiconductor memory devices and methods of operating semiconductor memory devices 有权

    公开(公告)号：US12136463B2

    公开(公告)日：2024-11-05

    申请号：US18113702

    申请日：2023-02-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kiheung Kim ,  Sanguhn Cha ,  Junhyung Kim ,  Sungchul Park ,  Hyojin Jung ,  Kyungsoo Ha

    IPC: G11C29/00 ,  G11C29/20 ,  G11C29/42 ,  G11C29/44 ,  G11C29/12

    Abstract: A semiconductor memory device includes a memory cell array, an error correction code (ECC) circuit, a fault address register and a control logic circuit. The memory cell array includes a plurality of memory cell rows. The scrubbing control circuit generates scrubbing addresses for performing a scrubbing operation on a first memory cell row based on refresh row addresses for refreshing the memory cell rows. The control logic circuit controls the ECC circuit such that the ECC circuit performs an error detection and correction operation on a plurality of sub-pages in the first memory cell row to count a number of error occurrences during a first interval and determines a sub operation in a second interval in the scrubbing operation based on the number of error occurrences in the first memory cell row.

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