公开(公告)号：US20090072272A1

公开(公告)日：2009-03-19

申请号：US11856687

申请日：2007-09-17

申请人： Chang Soo Suh ,  Umesh Mishra

发明人： Chang Soo Suh ,  Umesh Mishra

IPC分类号： H01L29/739 ,  H01L21/336

CPC分类号： H01L29/66462 ,  H01L29/1066 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/432 ,  H01L29/778 ,  H01L29/7781 ,  H01L29/7783 ,  H01L29/7787

摘要： Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.

摘要翻译： 描述了增强型III族氮化物器件。 2DEG在栅极区耗尽，使得器件在栅极没有施加偏压时不能传导电流。 形成为增强模式器件的镓面和氮化物面器件。

公开(公告)号：US20090072240A1

公开(公告)日：2009-03-19

申请号：US12102340

申请日：2008-04-14

申请人： Chang Soo Suh ,  Ilan Ben-Yaacov

发明人： Chang Soo Suh ,  Ilan Ben-Yaacov

IPC分类号： H01L29/778 ,  H01L21/338

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316 ,  H01L29/4236

摘要： III-nitride devices are described with recessed gates. In some embodiments, the material around the gates is formed by epitaxially depositing different III-nitride layers on a substrate and etching through at least the top two layers in the gate region. Because adjacent layers in the top three layers of the structure have different compositions, some of the layers act as etch stops to allow for precision etching. In some embodiments, a regrowth mask is used to prevent growth of material in the gate region. A gate electrode is deposited in the recess.

摘要翻译： III型氮化物器件用凹入栅极描述。 在一些实施例中，围绕栅极的材料通过在衬底上外延沉积不同的III族氮化物层并且蚀刻至少栅极区域中的顶部两层来形成。 因为结构的顶部三层中的相邻层具有不同的组成，所以一些层用作蚀刻停止以允许精密蚀刻。 在一些实施例中，再生长掩模用于防止栅极区域中材料的生长。 栅电极沉积在凹槽中。

公开(公告)号：US10319648B2

公开(公告)日：2019-06-11

申请号：US15955515

申请日：2018-04-17

申请人： Transphorm Inc.

发明人： Kurt Vernon Smith ,  Likun Shen ,  David Michael Rhodes ,  Ronald Avrom Barr ,  James Leroy McKay

IPC分类号： H01L21/00 ,  H01L21/66 ,  H01L21/48 ,  H01L21/78 ,  G01R31/26 ,  H01L29/20 ,  H01L29/778 ,  H01L21/67

摘要： Techniques for improving reliability of III-N devices include holding the III-N devices at a first temperature less than or equal to 30° for a first period of time while applying a first gate-source voltage lower than a threshold voltage of the III-N devices and a first drain-source voltage greater than 0.2 times a break down voltage of the III-N devices; and holding the III-N devices at a second temperature greater than the first temperature for a second period of time while applying a second gate-source voltage lower than a threshold voltage of the III-N devices and a second drain-source voltage greater than 0.2 times a breakdown voltage of the III-N devices. After holding the III-N devices at the first and second temperatures, screening the III-N devices based on electrical performance of one or more parameters of the III-N devices.

公开(公告)号：US09991884B2

公开(公告)日：2018-06-05

申请号：US15491920

申请日：2017-04-19

申请人： Transphorm Inc.

发明人： Zhan Wang ,  Yifeng Wu ,  James Honea

IPC分类号： H03B1/00 ,  H03K3/00 ,  H03K17/16 ,  H01L29/20 ,  H01L29/16 ,  H03K17/10 ,  H03K17/12 ,  H01L23/495 ,  H01L23/552 ,  H01L23/64 ,  H01L27/06 ,  H01L27/088 ,  H03K17/041 ,  H03K17/687 ,  H01L23/00

CPC分类号： H03K17/162 ,  H01L23/49562 ,  H01L23/552 ,  H01L23/645 ,  H01L24/48 ,  H01L27/0605 ,  H01L27/0883 ,  H01L29/16 ,  H01L29/2003 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/3025 ,  H03K17/04106 ,  H03K17/102 ,  H03K17/122 ,  H03K17/16 ,  H03K17/165 ,  H03K2017/6875 ,  H01L2224/45099

摘要： A circuit includes an electronic component package that comprises at least a first lead, a III-N device in the electronic component package, a gate driver, and a ferrite bead. The III-N device comprises a drain, gate, and source, where the source is coupled to the first lead. The gate driver comprises a first terminal and a second terminal, where the first terminal is coupled to the first lead. The ferrite bead is coupled between the gate of the III-N transistor and the second terminal of the gate driver. When switching, the deleterious effects of the parasitic inductance of the circuit gate loop are mitigated by the ferrite bead.

公开(公告)号：US09941399B2

公开(公告)日：2018-04-10

申请号：US15242266

申请日：2016-08-19

申请人： Transphorm Inc.

发明人： Umesh Mishra ,  Robert Coffie ,  Likun Shen ,  Ilan Ben-Yaacov ,  Primit Parikh

IPC分类号： H03H11/46 ,  H01L29/778 ,  H01L29/20 ,  H01L29/66 ,  H01L29/36 ,  H01L29/423 ,  H01L29/08 ,  H01L29/10 ,  H01L21/02 ,  H01L29/205 ,  H01L29/207 ,  H01L29/51

CPC分类号： H01L29/7784 ,  H01L21/0217 ,  H01L21/0254 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/207 ,  H01L29/365 ,  H01L29/4236 ,  H01L29/518 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/7788

摘要： A III-N semiconductor device that includes a substrate and a nitride channel layer including a region partly beneath a gate region, and two channel access regions on opposite sides of the part beneath the gate. The channel access regions may be in a different layer from the region beneath the gate. The device includes an AlXN layer adjacent the channel layer wherein X is gallium, indium or their combination, and a preferably n-doped GaN layer adjacent the AlXN layer in the areas adjacent to the channel access regions. The concentration of Al in the AlXN layer, the AlXN layer thickness and the n-doping concentration in the n-doped GaN layer are selected to induce a 2DEG charge in channel access regions without inducing any substantial 2DEG charge beneath the gate, so that the channel is not conductive in the absence of a switching voltage applied to the gate.

公开(公告)号：US09899998B2

公开(公告)日：2018-02-20

申请号：US14539098

申请日：2014-11-12

申请人： Transphorm Inc.

发明人： James Honea ,  Yifeng Wu

IPC分类号： H03K17/56 ,  H03K17/0814 ,  H03K17/16 ,  H03K17/567 ,  H03K17/687 ,  H03K17/22

CPC分类号： H03K17/08142 ,  H03K17/162 ,  H03K17/223 ,  H03K17/567 ,  H03K17/6871

摘要： A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at least one direction, in a second mode of operation of conducting substantial current in one direction through the channel and in a third mode of operation of conducting substantial current in an opposite direction through the channel. The half bridge can have two circuits with such a transistor.

公开(公告)号：US09842922B2

公开(公告)日：2017-12-12

申请号：US15227240

申请日：2016-08-03

申请人： Transphorm Inc.

发明人： Umesh Mishra ,  Rakesh K. Lal ,  Stacia Keller ,  Srabanti Chowdhury

IPC分类号： H01L29/06 ,  H01L29/778 ,  H01L29/20 ,  H01L29/66 ,  H01L29/04 ,  H01L29/15 ,  H01L29/205 ,  H01L29/51

CPC分类号： H01L29/7783 ,  H01L29/045 ,  H01L29/15 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/51 ,  H01L29/66462

摘要： A transistor includes a III-N layer structure comprising a III-N channel layer between a III-N barrier layer and a p-type III-N layer. The transistor further includes a source, a drain, and a gate between the source and the drain, the gate being over the III-N layer structure. The p-type III-N layer includes a first portion that is at least partially in a device access region between the gate and the drain, and the first portion of the p-type III-N layer is electrically connected to the source and electrically isolated from the drain. When the transistor is biased in the off state, the p-type layer can cause channel charge in the device access region to deplete as the drain voltage increases, thereby leading to higher breakdown voltages.

公开(公告)号：US09819336B2

公开(公告)日：2017-11-14

申请号：US14539098

申请日：2014-11-12

申请人： Transphorm Inc.

发明人： James Honea ,  Yifeng Wu

IPC分类号： H03K17/56 ,  H03K17/0814 ,  H03K17/16 ,  H03K17/567 ,  H03K17/687 ,  H03K17/22

摘要： A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at least one direction, in a second mode of operation of conducting substantial current in one direction through the channel and in a third mode of operation of conducting substantial current in an opposite direction through the channel. The half bridge can have two circuits with such a transistor.

公开(公告)号：US09818686B2

公开(公告)日：2017-11-14

申请号：US15138681

申请日：2016-04-26

申请人： Transphorm Inc.

发明人： Yifeng Wu ,  Sung Hae Yea

IPC分类号： H01L23/498 ,  H01L27/088 ,  H03K17/16 ,  H01L21/56 ,  H01L27/06 ,  H01L23/373 ,  H01L25/065 ,  H01L25/07 ,  H01L25/00 ,  H01L23/552 ,  H01L29/20 ,  H01L29/778 ,  H01L23/00

CPC分类号： H01L23/49838 ,  H01L21/56 ,  H01L23/3735 ,  H01L23/49811 ,  H01L23/49866 ,  H01L23/552 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/80 ,  H01L24/85 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/072 ,  H01L25/074 ,  H01L25/50 ,  H01L27/0629 ,  H01L27/0883 ,  H01L29/2003 ,  H01L29/7787 ,  H01L2224/291 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48249 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/12036 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/30107 ,  H03K17/161 ,  H03K17/162 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： Electronic modules, and methods of forming and operating modules, are described. The modules include a capacitor, a first switching device, and a second switching device. The electronic modules further include a substrate such as a DBC substrate, which includes an insulating layer between a first metal layer and a second metal layer, and may include multiple layers of DBC substrates stacked over one another. The first metal layer includes a first portion and a second portion isolated from one another by a trench formed through the first metal layer between the two portions. The first and second switching devices are over the first metal layer, a first terminal of the capacitor is electrically connected to the first portion of the first metal layer, and a second terminal of the capacitor is electrically connected to the second portion of the first metal layer, with the capacitor extending over the trench.

公开(公告)号：US09685323B2

公开(公告)日：2017-06-20

申请号：US14885943

申请日：2015-10-16

申请人： Transphorm Inc.

发明人： Stacia Keller ,  Brian L. Swenson ,  Nicholas Fichtenbaum

IPC分类号： H01L21/02 ,  H01L29/778 ,  H01L29/10 ,  H01L29/20 ,  H01L29/66

CPC分类号： H01L21/02507 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/02581 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

摘要： Embodiments of the present disclosure include a buffer structure suited for III-N device having a foreign substrate. The buffer structure can include a first buffer layer having a first aluminum composition and a second buffer layer formed on the first buffer layer, the second buffer layer having a second aluminum composition. The buffer structure further includes a third buffer layer formed on the second buffer layer at a second interface, the third buffer layer having a third aluminum composition. The first aluminum composition decreases in the first buffer layer towards the interface and the second aluminum composition throughout the second buffer layer is greater than the first aluminum composition at the interface.