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    HIGH VOLTAGE POWER STAGE USING LOW VOLTAGE TRANSISTORS
    2.
    发明公开
    HIGH VOLTAGE POWER STAGE USING LOW VOLTAGE TRANSISTORS 审中-公开

    公开(公告)号：US20240313768A1

    公开(公告)日：2024-09-19

    申请号：US18306378

    申请日：2023-04-25

    申请人： Texas Instruments Incorporated

    发明人： Sri Navaneethakrishnan Easwaran ,  Angelo Pereira ,  Yueming Sun ,  Kae Wong ,  Ahmed E Hashim ,  Artur Lewinski

    IPC分类号： H03K17/687 ,  H03K17/10 ,  H03K17/567

    CPC分类号： H03K17/687 ,  H01L27/02 ,  H03K17/102 ,  H03K17/567

    摘要： Described embodiments include a voltage converter power circuit having a high-voltage rated first transistor with a first current terminal coupled to an input voltage terminal, and a second current terminal. A second transistor, a low-voltage rated transistor, has a second control terminal, a third current terminal coupled to the second current terminal, and a fourth current terminal coupled to a switching terminal. A third transistor, a high-voltage rated transistor, has a fifth current terminal coupled to the switching terminal, a sixth current terminal, and a third control terminal. A fourth transistor, a low-voltage rated transistor, is coupled between the sixth current terminal and a ground terminal. A bleeder circuit is coupled between the seventh and eighth current terminals and is configured to prevent a voltage across the fourth transistor from exceeding a breakdown voltage.

    INTEGRATE-AND-FIRE NEURON CIRCUIT AND OPERATION METHOD THEREOF
    3.
    发明公开
    INTEGRATE-AND-FIRE NEURON CIRCUIT AND OPERATION METHOD THEREOF 审中-公开

    公开(公告)号：US20240296319A1

    公开(公告)日：2024-09-05

    申请号：US18544268

    申请日：2023-12-18

    申请人： POSTECH Research and Business Development Foundation

    发明人： Chang Ki BAEK ,  Yi Joon KIM ,  Hyang Woo KIM

    IPC分类号： G06N3/063 ,  H01L29/165 ,  H01L29/68 ,  H01L29/78 ,  H03K17/567

    CPC分类号： G06N3/063 ,  H03K17/567 ,  H01L29/165 ,  H01L29/685 ,  H01L29/78

    摘要： Disclosed are an integrate-and-fire neuron circuit implemented to enable an integrate-and-fire operation with only a small number of devices by using bistable resistance characteristics of the same two heterojunction NPN devices, unlike a CMOS-based integrate-and-fire neuron circuit having a complex structure, and an operation method thereof. In one or more aspects, an integrate-and-fire neuron circuit and an operation method thereof can increase neuron integration in a system by implementing an integrate-and-fire operation of neurons using only three transistors and two capacitors, or two transistors, one resistor and one capacitor, can improve the efficiency of spiking neural network learning by controlling a fire threshold point of neurons through regulation of a gate voltage of the same two NPN devices, and can expect an increase in energy efficiency of the entire system through inhibition of excessive fire by implementing excitatory and inhibitory post-synaptic potentials.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CIRCUIT
    5.
    发明公开
    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CIRCUIT 审中-公开

    公开(公告)号：US20240258413A1

    公开(公告)日：2024-08-01

    申请号：US18631243

    申请日：2024-04-10

    申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

    发明人： Tomoko MATSUDAI ,  Yoko IWAKAJI ,  Hiroko ITOKAZU

    IPC分类号： H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H03K17/567

    CPC分类号： H01L29/7397 ,  H01L29/0623 ,  H01L29/1095 ,  H03K17/567

    摘要： A semiconductor device of embodiments includes: a semiconductor layer having a first face and a second face opposite to the first face and including a first trench, a second trench, and a third trench provided on a first face side; a first gate electrode in the first trench; a second gate electrode in the second trench; a third gate electrode in the third trench; a fourth gate electrode and a fifth gate electrode provided on a second face side; a first electrode contacting the first face; a second electrode contacting the second face; a first electrode pad electrically connected to the first gate electrode; a second electrode pad electrically connected to the second gate electrode; a third electrode pad electrically connected to the third gate electrode; a fourth electrode pad electrically connected to the fourth gate electrode; and a fifth electrode pad electrically connected to the fifth gate electrode.

    CIRCUIT AND DEVICE INCLUDING A TRANSISTOR AND DIODE
    6.
    发明公开
    CIRCUIT AND DEVICE INCLUDING A TRANSISTOR AND DIODE 审中-公开

    公开(公告)号：US20240250683A1

    公开(公告)日：2024-07-25

    申请号：US18436339

    申请日：2024-02-08

    申请人： Search For The Next, LTD.

    发明人： David SUMMERLAND ,  Roger LIGHT ,  Luke KNIGHT

    IPC分类号： H03K17/567 ,  H01L27/07 ,  H03K19/084

    CPC分类号： H03K17/567 ,  H01L27/0783 ,  H03K19/084

    摘要： An inverter logic circuit includes a bipolar junction transistor and a zener diode. The zener diode is connected between the base of the bipolar junction transistor and ground (or other reference voltage). The zener diode is reverse biased such that a leakage current through the zener diode allows for sufficient current through the emitter-base terminals of the bipolar junction transistor when a voltage is applied across the emitter and base terminals of the bipolar junction transistor to turn the transistor ON in the absence of an external signal to the base. As such the bipolar junction transistor functions as a normally ON bipolar junction transistor.

    Drive circuit of switching element and intelligent power module
    7.
    发明授权
    Drive circuit of switching element and intelligent power module 有权

    公开(公告)号：US12021511B2

    公开(公告)日：2024-06-25

    申请号：US18160358

    申请日：2023-01-27

    申请人： FUJI ELECTRIC CO., LTD.

    发明人： Masanari Fujii

    IPC分类号： H03K17/082 ,  H02M1/08 ,  H03K17/567

    CPC分类号： H03K17/082 ,  H02M1/08 ,  H03K17/567

    摘要： There is provided a drive circuit of a switching element and an intelligent power module both capable of preventing deterioration of a switching loss of the switching element. A gate drive circuit includes a first current supply section which supplies a first current to a gate terminal provided in an IGBT when a gate voltage of the gate terminal is lower than a first voltage, a second current supply section which supplies a second current smaller than the first current to the gate terminal when the gate voltage of the gate terminal is higher than a second voltage which is the same as or higher than the first voltage, and a third current supply section which supplies a third current smaller than the first current and larger than the second current to the gate terminal when the gate voltage of the gate terminal is lower than a third voltage lower than the first voltage.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CIRCUIT
    9.
    发明公开
    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CIRCUIT 审中-公开

    公开(公告)号：US20240203983A1

    公开(公告)日：2024-06-20

    申请号：US18594551

    申请日：2024-03-04

    申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

    发明人： Tomoko MATSUDAI ,  Yoko IWAKAJI ,  Ryohei GEJO

    IPC分类号： H01L27/06 ,  H01L29/739 ,  H01L29/861 ,  H03K17/567

    CPC分类号： H01L27/0664 ,  H01L29/7397 ,  H01L29/8613 ,  H03K17/567

    摘要： A semiconductor device according to the embodiment includes: a transistor region including a first trench, a first gate electrode provided in the first trench, a second trench, a second gate electrode provided in the second trench, a third trench, and a third gate electrode provided in the third trench; a diode region including a fifth trench and a conductive layer provided in the fifth trench; a boundary region including a fourth trench and a fourth gate electrode provided in the fourth trench, the boundary region being provided between the transistor region and the diode region; a first electrode pad electrically connected to the first gate electrode; a second electrode pad electrically connected to the second gate electrode; and a third electrode pad electrically connected to the third gate electrode and the fourth gate electrode.

    Apparatus and circuits with dual polarization transistors and methods of fabricating the same
    10.
    发明授权
    Apparatus and circuits with dual polarization transistors and methods of fabricating the same 有权

    公开(公告)号：US11990541B2

    公开(公告)日：2024-05-21

    申请号：US18124490

    申请日：2023-03-21

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Chan-Hong Chern

    IPC分类号： H01L29/778 ,  H01L27/07 ,  H01L29/66 ,  H03K17/567

    CPC分类号： H01L29/7787 ,  H01L27/0727 ,  H01L29/66462 ,  H03K17/567

    摘要： Apparatus and circuits with dual polarization transistors and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active layer that is formed over the substrate and comprises a first active portion having a first thickness and a second active portion having a second thickness; a first transistor comprising a first source region, a first drain region, and a first gate structure formed over the first active portion and between the first source region and the first drain region; and a second transistor comprising a second source region, a second drain region, and a second gate structure formed over the second active portion and between the second source region and the second drain region, wherein the first thickness is different from the second thickness.