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1.发明公开公开(公告)号：US20240305086A1
公开(公告)日：2024-09-12
申请号：US18179548
申请日：2023-03-07
Applicant: Siemens Industry, Inc.
Inventor： Guang Yang
CPC classification number: H02H3/087 , H02H9/043 , H03K17/161
Abstract: A DC solid-state circuit breaker is provided with a solid-state aided airgap to ensure successful interruption of current at DC conditions for providing an acceptable fail-safe mechanism in case of main power electronics failure. The DC solid-state circuit breaker comprises a sensing and control circuit configured to realize designed functions. The DC solid-state circuit breaker further comprises a power electronics section that includes a first solid-state switching component for normal operations. The DC solid-state circuit breaker further comprises an air gap section disposed in series with the power electronics section and is configured to perform fail-safe interruption and to provide isolation. The air gap section includes an isolation switch which is connected in series to a fail-safe interruption combination of a current commutation switch and a second solid-state switching component, which are connected in parallel.
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公开(公告)号：US20240213978A1
公开(公告)日：2024-06-27
申请号：US18180581
申请日：2023-03-08
Applicant: NXP B.V.
Inventor： Saurabh Goyal , Krishna Thakur
IPC: H03K17/16
CPC classification number: H03K17/161
Abstract: A bootstrap switch circuit includes a transistor-based switch controlled by a first gate signal and a leakage protection transistor controlled by a second gate signal configured to reduce gate induced drain leakage in the transistor-based switch A first gate driver is included that produces a first gate signal at its output so that the first gate signal turns on the transistor-based switch during a sampling mode and turns off the transistor-based switch during a hold mode. A second gate driver is included that produces a second gate signal at its output and to receive the output signal of the bootstrap switch circuit so that the second gate signal turns on the leakage protection transistor during the sampling mode and turns off the leakage protection transistor during the hold mode and the second gate signal is based upon the output signal of the bootstrap switch circuit.
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公开(公告)号：US20240120912A1
公开(公告)日：2024-04-11
申请号：US17963084
申请日：2022-10-10
Applicant: SEMTECH CORPORATION
Inventor： Steven Greig PORTER , Stanley Jeh-Chun MA
CPC classification number: H03K17/161 , H03H11/28
Abstract: A signal driver may include a variable termination resistor and a signal transmission line. The variable termination resistor may include one or more variable termination resistor units. Each of the one or more variable termination resistor units may include a switch connected to a first end node of the variable termination resistor; a T-coil connected to the switch; a first resistor connected to the first end node of the variable termination resistor and to the T-coil; and a second resistor connected to a second end node of the variable termination resistor and to the T-coil. The signal transmission line may be connected to the second end node of the variable termination resistor.
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公开(公告)号：US11936372B2
公开(公告)日：2024-03-19
申请号：US18188144
申请日：2023-03-22
Applicant: Magnachip Semiconductor, Ltd.
Inventor： Jung Hoon Sul , Dong Il Seo
CPC classification number: H03K17/161 , H03F3/45179 , H03K5/04 , H03F2200/552 , H03F2203/45248
Abstract: A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.
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公开(公告)号：US20240030923A1
公开(公告)日：2024-01-25
申请号：US18478572
申请日：2023-09-29
Inventor： John Laurence PENNOCK , John Paul LESSO
IPC: H03K19/0948 , H03K17/16 , H03K19/003 , H03M1/00
CPC classification number: H03K19/0948 , H03K17/161 , H03K19/00346 , H03K19/00369 , H03M1/001
Abstract: This application relates to control of semiconductor devices, in particular MOS devices, so as to reduce RTS/flicker noise. A circuit (100) includes a first MOS device (103, 104) and a bias controller (107). The circuit is operable in at least a first circuit state (PRO) in which the first MOS device is active to contribute to a first signal (Sout) and a second circuit state (PRST) in which the first MOS device does not contribute to the first signal. The bias controller is operable to control voltages at one or more terminals of the first MOS device to apply a pre-bias (VPB1, VPB2) during an instance of the second circuit state. The pre-bias is applied to set an occupancy state of charge carriers traps within the first MOS device, to limit noise during subsequent operation in the first circuit state. In embodiments, the bias controller is configured so that at least one parameter of the pre-bias is selectively variable in use based on one or more operating conditions.
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公开(公告)号：US20240007094A1
公开(公告)日：2024-01-04
申请号：US18328282
申请日：2023-06-02
Inventor： Hironori AKIYAMA
CPC classification number: H03K17/08 , H03K17/161 , H02M1/08
Abstract: A gate driver drives a gate of a semiconductor switching element. The gate driver includes a command signal output circuit, a pre-drive circuit and a drive circuit. The command signal output circuit outputs a current command signal that indicates a command value of a gate current as a current flowing through the gate of the semiconductor switching element. The pre-drive circuit receives the current command signal and generate a drive signal corresponding to the current command signal to output the drive signal. The drive circuit drives the gate of the semiconductor switching element based on the drive signal. The command signal output circuit switches the command value indicated by the current command signal while controlling a transient voltage at a desired target value. The drive circuit includes output circuits connected in parallel. Each of output circuits has at least one cascode circuit in which two MOSFETs are cascode-connected.
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公开(公告)号：US11804833B1
公开(公告)日：2023-10-31
申请号：US17809344
申请日：2022-06-28
Applicant: InventChip Technology Co., Ltd.
Inventor： Zhong Ye , Danyang Zhu
IPC: H03K17/16 , G01R31/52 , G01R19/165 , G06F1/26
CPC classification number: H03K17/161 , G01R19/16576 , G01R31/52 , G06F1/26
Abstract: An apparatus includes a capacitor coupled to a power switch, wherein the capacitor is configured to provide a negative gate voltage to the power switch when a turn-off signal is applied to a gate of the power switch, and a sink and source power supply coupled to the capacitor, wherein the sink and source power supply has a first current limit for controlling a sink current flowing from the capacitor to the sink and source power supply, and a second current limit for controlling a source current flowing from the sink and source power supply to the capacitor.
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公开(公告)号：US11804769B2
公开(公告)日：2023-10-31
申请号：US17138603
申请日：2020-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Eduardas Jodka , Gaetano Maria Walter Petrina , Manuel Wiersch
IPC: H02M1/08 , H02M1/44 , H03K17/687 , H03K17/16
CPC classification number: H02M1/08 , H02M1/44 , H03K17/161 , H03K17/687
Abstract: In some examples, an apparatus includes a driver having a driver output, a capacitor having a first plate and a second plate, the first plate coupled to the driver output, and a transistor having a transistor gate, a transistor source, and a transistor drain. The apparatus also includes a first switch coupled between the second plate and the transistor gate, a second switch coupled between the second plate and the transistor drain, and a third switch coupled between the transistor gate and the transistor drain.
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公开(公告)号：US11695407B2
公开(公告)日：2023-07-04
申请号：US17543720
申请日：2021-12-06
Applicant: pSemi Corporation
Inventor： Alexander Dribinsky , Tae Youn Kim , Dylan J. Kelly , Christopher N. Brindle
IPC: H03K17/16 , H03K17/10 , H03K17/284 , H03K17/687 , H03K17/689 , H03K17/04 , H03K17/06 , H03K17/08
CPC classification number: H03K17/161 , H03K17/102 , H03K17/284 , H03K17/689 , H03K17/6874 , H03K17/04 , H03K17/06 , H03K17/08 , H03K2217/0009
Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.
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公开(公告)号：US20190245533A1
公开(公告)日：2019-08-08
申请号：US16264186
申请日：2019-01-31
Applicant: Infineon Technologies AG
Inventor： Bernd Schleicher , Winfried Bakalski , Ruediger Bauder , Valentyn Solomko
IPC: H03K17/16 , H03K17/687
CPC classification number: H03K17/161 , H03K17/6871 , H03K17/693
Abstract: An RF switch includes series-coupled RF switch cells coupled between an RF input and ground, a transistor including a first current node coupled to a first load resistor, a second current node coupled to ground, and a control node coupled to an internal switch node, and a filter having an input coupled to the first current node of the first transistor and an output for providing a DC voltage corresponding to the RF power present at the internal switch node.
