公开(公告)号：US20240365528A1

公开(公告)日：2024-10-31

申请号：US18643224

申请日：2024-04-23

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Changhoon SUNG ,  Hyojin Cho ,  Hoyoung Tang ,  Taehyung Kim ,  Eojin Lee

IPC分类号： H10B10/00 ,  G11C5/06 ,  H01L23/528 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

CPC分类号： H10B10/125 ,  G11C5/063 ,  H01L23/5283 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/7851 ,  H01L29/78696

摘要： An integrated circuit is provided and includes a memory cell array, a plurality of gate electrodes extending in a first direction above a substrate, a plurality of word lines extending in the first direction above the substrate, a plurality of bit lines extending below the substrate in a second direction intersecting the first direction, and a plurality of first contacts passing through the substrate in a vertical direction and respectively connected to the plurality of bit lines.

公开(公告)号：US20240363763A1

公开(公告)日：2024-10-31

申请号：US18771108

申请日：2024-07-12

申请人： Micron Technology, Inc.

发明人： Kamal M. Karda ,  Durai Vishak Nirmal Ramaswamy ,  Haitao Liu

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/78696 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/823412 ,  H01L29/66666 ,  H01L29/66969 ,  H01L29/7827 ,  H01L29/78642 ,  H01L29/7869

摘要： A device comprises a vertical transistor and a shielding material comprising a conductive material having a P+ type conductivity. The vertical transistor includes an electrode, a dielectric material adjacent to the electrode, and a channel region adjacent to the dielectric material. The channel region comprises a composite structure including at least two semiconductor materials. Also disclosed is a device comprising a first electrically conductive line, vertical transistors overlying the first conductive line, a second electrically conductive line overlying the vertical transistors, and a shielding material positioned between the two adjacent vertical transistors. Each of the vertical transistors comprises a gate electrode, a gate dielectric material on opposite sides of the gate electrode, and a channel region comprising a composite structure including at least two oxide semiconductor materials. The gate dielectric material positions between the gate electrode and the channel region. The shielding material comprises an electrically conductive material.

公开(公告)号：US20240363750A1

公开(公告)日：2024-10-31

申请号：US18771200

申请日：2024-07-12

申请人： Renesas Electronics Corporation

发明人： Kazuya UEJIMA ,  Shiro KAMOHARA ,  Michio ONDA ,  Takashi HASE ,  Tatsuo NISHINO

IPC分类号： H01L29/78 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/45 ,  H01L29/51 ,  H03F3/45

CPC分类号： H01L29/7838 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1083 ,  H01L29/42376 ,  H01L29/45 ,  H01L29/517 ,  H03F3/45179

摘要： In a semiconductor device according to an embodiment, a thickness of a semiconductor layer of an SOI substrate on which a field effect transistor constituting an analog circuit is formed is set to 2 nm or more and 24 nm or less.

公开(公告)号：US20240363747A1

公开(公告)日：2024-10-31

申请号：US18603396

申请日：2024-03-13

申请人： Renesas Electronics Corporation

发明人： Hiroshi YANAGIGAWA

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/10

CPC分类号： H01L29/7813 ,  H01L29/0619 ,  H01L29/1095

摘要： The semiconductor device includes a pair of gate-electrodes GE formed inside the pair of trenches TR via an gate insulating film (GI), respectively. The pair of column regions PC are spaced apart from each other in the Y-direction. The pair of trenches TR are provided apart from each other in the Y direction, are provided between the pair of column regions PC in the Y direction, and extend in the X direction. The ends of the pair of trenches TR in the X direction are connected to each other by a connecting portion TRa extending in the Y direction. The connection portion TRa is integrated with the pair of trenches TR. The pair of column regions PC extend in the X direction along the pair of trenches TR, and extend in the X direction toward the outer edge of the semiconductor substrate beyond the connection portion TRa.

公开(公告)号：US20240363736A1

公开(公告)日：2024-10-31

申请号：US18770792

申请日：2024-07-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Su-Hao Liu ,  Huicheng Chang ,  Chien-Tai Chan ,  Liang-Yin Chen ,  Yee-Chia Yeo ,  Szu-Ying Chen

IPC分类号： H01L29/66 ,  H01L21/8234 ,  H01L29/78

CPC分类号： H01L29/66818 ,  H01L21/823431 ,  H01L29/785

摘要： The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first fin structure with a first height and a first width formed over the substrate, a second fin structure with a second height and a second width formed over the substrate, and an insulating stack formed over lower portions of the first and second fin structures. The second height can be substantially equal to the first height and the second width can be greater than the first width. A top surface of the insulating stack can be below top surfaces of the first and second fin structures.

公开(公告)号：US20240363710A1

公开(公告)日：2024-10-31

申请号：US18641457

申请日：2024-04-22

申请人： ROHM CO., LTD.

发明人： Kenta WATANABE

IPC分类号： H01L29/423 ,  H01L29/40 ,  H01L29/417 ,  H01L29/78

CPC分类号： H01L29/4236 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/7813

摘要： The present disclosure provides a semiconductor device. The semiconductor device includes: a first gate trench and a second gate trench, arranged along a first direction in a plan view seen from a direction perpendicular to the upper surface, and extending along a second direction intersecting the first direction; a third gate trench, extending along the first direction from the first gate trench toward the second gate trench and forming a first gap with the second gate trench; a fourth gate trench, spaced apart from the third gate trench along the second direction, extending along the first direction from the second gate trench toward the first gate trench and forming a second gap with the first gate trench; a field plate trench, disposed in a cell region surrounded by the first to fourth gate trenches; and gate electrodes, disposed within the first to fourth gate trenches.

公开(公告)号：US20240363707A1

公开(公告)日：2024-10-31

申请号：US18769182

申请日：2024-07-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Wen HUANG ,  Chung-Ting KO ,  Hong-Hsien KE ,  Chia-Hui LIN ,  Tai-Chun HUANG

IPC分类号： H01L29/417 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3115 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/41791 ,  H01L21/02063 ,  H01L21/0217 ,  H01L21/02321 ,  H01L21/0234 ,  H01L21/02343 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3115 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L29/0847 ,  H01L29/41766 ,  H01L29/45 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7848

摘要： A semiconductor device is provided. The semiconductor device includes a source/drain structure, a contact structure, a glue layer, a barrier layer, and a silicide layer. The contact structure is over the source/drain structure. The glue layer surrounds the contact structure. The barrier layer is formed on at least a portion of a sidewall surface of the contact structure. The silicide layer is between the source/drain structure and the contact structure, and the silicide layer is in direct contact with the glue layer. The bottom surface of the glue layer is lower than the top surface of the source/drain structure and the bottom surface of the barrier layer.

公开(公告)号：US20240363688A1

公开(公告)日：2024-10-31

申请号：US18764317

申请日：2024-07-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Tse Hung ,  Ang-Sheng Chou ,  Hung-Li Chiang ,  Tzu-Chiang Chen ,  Chao-Ching Cheng

IPC分类号： H01L29/10 ,  H01L23/36 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/1033 ,  H01L23/36 ,  H01L29/0607 ,  H01L29/0669 ,  H01L29/66477 ,  H01L29/78

摘要： A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a heat transfer layer disposed over a substrate, a channel material layer, a gate structure and source and drain terminals. The channel material layer has a first surface and a second surface opposite to the first surface, and the channel material layer is disposed on the heat transfer layer with the first surface in contact with the heat transfer layer. The gate structure is disposed above the channel material layer. The source and drain terminals are in contact with the channel material layer and located at two opposite sides of the gate structure.

公开(公告)号：US20240363531A1

公开(公告)日：2024-10-31

申请号：US18626935

申请日：2024-04-04

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Soyeon Kim ,  Hoyoung Tang ,  Taehyung Kim

IPC分类号： H01L23/528 ,  G11C5/06 ,  G11C11/419 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786 ,  H10B10/00

CPC分类号： H01L23/5283 ,  G11C5/063 ,  G11C11/419 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/7851 ,  H01L29/78696 ,  H10B10/125

摘要： Provided is an integrated circuit including a cell array disposed on a substrate and including a plurality of bit cells, a row decoder including a plurality of word line drivers each providing a plurality of word line signals to the cell array, a backside wiring layer disposed on a back side of the substrate to overlap the row decoder and providing power to the plurality of word line drivers, and a plurality of backside contacts between the row decoder and the backside wiring layer. Each of the plurality of backside contacts extends from a source of at least one transistor included in each of the plurality of word line drivers to the backside wiring layer.

公开(公告)号：US20240363439A1

公开(公告)日：2024-10-31

申请号：US18770861

申请日：2024-07-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shiu-Ko JANGJIAN ,  Tzu-Kai LIN ,  Chi-Cherng JENG

IPC分类号： H01L21/8238 ,  H01L21/02 ,  H01L21/324 ,  H01L27/092 ,  H01L29/165 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823821 ,  H01L21/02532 ,  H01L21/324 ,  H01L21/823814 ,  H01L27/0924 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

摘要： A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device also includes a gate stack covering a portion of the fin structure and an epitaxially grown source/drain structure over the fin structure and adjacent to the gate stack. The semiconductor device further includes a semiconductor protection layer over the epitaxially grown source/drain structure. The semiconductor protection layer has an atomic concentration of silicon greater than that of the epitaxially grown source/drain structure.