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公开(公告)号:US09530761B2
公开(公告)日:2016-12-27
申请号:US13597973
申请日:2012-08-29
申请人: Alan Roth , Eric Soenen , Chaohao Wang
发明人: Alan Roth , Eric Soenen , Chaohao Wang
CPC分类号: H02M3/158 , H01L23/5226 , H01L24/05 , H01L24/29 , H01L24/45 , H01L24/48 , H01L25/16 , H01L28/10 , H01L28/40 , H01L2224/05025 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05184 , H01L2224/29025 , H01L2224/2919 , H01L2224/32265 , H01L2224/4502 , H01L2224/45111 , H01L2224/45116 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48265 , H01L2924/00014 , H01L2924/01047 , H01L2924/0479 , H01L2924/048 , H01L2924/04941 , H01L2924/04953 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10337 , H01L2924/10339 , H01L2924/10342 , H01L2924/10351 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/14252 , H01L2924/1427 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H05K1/111 , H05K1/181 , H05K1/185 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/10166 , Y02P70/611 , H01L2224/45099 , H01L2924/00
摘要: A package system includes at least one active circuitry disposed over a substrate. A passivation structure is disposed over the at least one active circuitry. The passivation structure has at least one opening that is configured to expose at least one first electrical pad. At least one passive electrical component is disposed over the passivation structure. The at least one passive electrical component is electrically coupled with the at least one first electrical pad.
摘要翻译: 封装系统包括设置在衬底上的至少一个有源电路。 钝化结构设置在至少一个有源电路上。 钝化结构具有至少一个开口,其被配置为暴露至少一个第一电垫。 在钝化结构上方设置至少一个无源电组件。 所述至少一个无源电部件与所述至少一个第一电焊盘电耦合。
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公开(公告)号:US20190027465A1
公开(公告)日:2019-01-24
申请号:US16126428
申请日:2018-09-10
发明人: Sung-Feng Yeh , Chen-Hua Yu , Ming-Fa Chen
IPC分类号: H01L25/065 , H01L21/48 , H01L23/00 , H01L21/56 , H01L23/31 , H01L25/00 , H01L23/522 , H01L23/538 , H01L23/498
CPC分类号: H01L25/0652 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L21/568 , H01L23/3114 , H01L23/3135 , H01L23/315 , H01L23/49816 , H01L23/5226 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/08 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/32 , H01L24/80 , H01L24/83 , H01L24/96 , H01L25/50 , H01L2224/04105 , H01L2224/08121 , H01L2224/08145 , H01L2224/12105 , H01L2224/19 , H01L2224/29076 , H01L2224/291 , H01L2224/29186 , H01L2224/32145 , H01L2224/32225 , H01L2224/32227 , H01L2224/73209 , H01L2224/73267 , H01L2224/80006 , H01L2224/80895 , H01L2224/80896 , H01L2224/8203 , H01L2224/83895 , H01L2224/83896 , H01L2224/92124 , H01L2224/97 , H01L2225/06524 , H01L2225/06548 , H01L2225/06555 , H01L2225/06582 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10338 , H01L2924/10339 , H01L2924/10342 , H01L2924/14 , H01L2924/141 , H01L2924/143 , H01L2924/1431 , H01L2924/1434 , H01L2924/1816 , H01L2924/18162 , H01L2224/80 , H01L2224/83005 , H01L2224/80001 , H01L2924/00014
摘要: An embodiment method for forming a semiconductor package includes attaching a first die to a first carrier, depositing a first isolation material around the first die, and after depositing the first isolation material, bonding a second die to the first die. Bonding the second die to the first die includes forming a dielectric-to-dielectric bond. The method further includes removing the first carrier and forming fan-out redistribution layers (RDLs) on an opposing side of the first die as the second die. The fan-out RDLs are electrically connected to the first die and the second die.
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公开(公告)号:US20170063236A1
公开(公告)日:2017-03-02
申请号:US15352914
申请日:2016-11-16
发明人: Alan ROTH , Eric SOENEN , Chaohao WANG
CPC分类号: H02M3/158 , H01L23/5226 , H01L24/05 , H01L24/29 , H01L24/45 , H01L24/48 , H01L25/16 , H01L28/10 , H01L28/40 , H01L2224/05025 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05184 , H01L2224/29025 , H01L2224/2919 , H01L2224/32265 , H01L2224/4502 , H01L2224/45111 , H01L2224/45116 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48265 , H01L2924/00014 , H01L2924/01047 , H01L2924/0479 , H01L2924/048 , H01L2924/04941 , H01L2924/04953 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10337 , H01L2924/10339 , H01L2924/10342 , H01L2924/10351 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/14252 , H01L2924/1427 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H05K1/111 , H05K1/181 , H05K1/185 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/10166 , Y02P70/611 , H01L2224/45099 , H01L2924/00
摘要: A converter includes a plurality of active circuitry elements over a substrate. The converter further includes a passivation structure over the plurality of active circuitry elements, the passivation structure having at least one opening that is configured to expose at least one electrical pad of each active circuitry element. The converter further includes a plurality of passive electrical components over the passivation structure, wherein each passive electrical component is selectively connectable with at least one other passive electrical component, and a first side of each passive electrical component is electrically coupled to an electrical pad of each of at least two active circuitry elements. The converter further includes a plurality of electrical connection structures, wherein a first electrical connection structure electrically couples an electrical pad of a first active circuitry element to a corresponding passive electrical component, and the first electrical connection structure is completely within the passivation structure.
摘要翻译: A转换器包括在衬底上的多个有源电路元件。 该转换器还包括多个有源电路元件上的钝化结构,该钝化结构具有至少一个开口,其被配置为暴露每个有源电路元件的至少一个电焊盘。 转换器还包括钝化结构上的多个无源电部件,其中每个无源电部件可选择地与至少一个其它无源电部件连接,并且每个无源电部件的第一侧电耦合到每个无源电部件的电焊盘 至少两个有源电路元件。 转换器还包括多个电连接结构,其中第一电连接结构将第一有源电路元件的电焊盘电耦合到相应的无源电组件,并且第一电连接结构完全在钝化结构内。
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公开(公告)号:US11658150B2
公开(公告)日:2023-05-23
申请号:US17379394
申请日:2021-07-19
发明人: Sung-Feng Yeh , Chen-Hua Yu , Ming-Fa Chen
IPC分类号: H01L23/538 , H01L25/065 , H01L23/522 , H01L23/00 , H01L21/48 , H01L21/56 , H01L23/31 , H01L25/00 , H01L23/498
CPC分类号: H01L25/0652 , H01L21/486 , H01L21/4853 , H01L21/4857 , H01L21/565 , H01L23/3114 , H01L23/5226 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/96 , H01L25/50 , H01L21/568 , H01L23/315 , H01L23/3135 , H01L23/49816 , H01L24/08 , H01L24/32 , H01L24/80 , H01L24/83 , H01L2224/04105 , H01L2224/08121 , H01L2224/08145 , H01L2224/12105 , H01L2224/19 , H01L2224/291 , H01L2224/29076 , H01L2224/29186 , H01L2224/32145 , H01L2224/32225 , H01L2224/32227 , H01L2224/73209 , H01L2224/73267 , H01L2224/80006 , H01L2224/80895 , H01L2224/80896 , H01L2224/8203 , H01L2224/83895 , H01L2224/83896 , H01L2224/92124 , H01L2224/97 , H01L2225/06524 , H01L2225/06548 , H01L2225/06555 , H01L2225/06582 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10338 , H01L2924/10339 , H01L2924/10342 , H01L2924/14 , H01L2924/141 , H01L2924/143 , H01L2924/1431 , H01L2924/1434 , H01L2924/1816 , H01L2924/18162 , H01L2224/97 , H01L2224/80 , H01L2224/19 , H01L2224/83005 , H01L2224/97 , H01L2224/80001 , H01L2224/29186 , H01L2924/00014 , H01L2224/291 , H01L2924/00014
摘要: An embodiment method for forming a semiconductor package includes attaching a first die to a first carrier, depositing a first isolation material around the first die, and after depositing the first isolation material, bonding a second die to the first die. Bonding the second die to the first die includes forming a dielectric-to-dielectric bond. The method further includes removing the first carrier and forming fan-out redistribution layers (RDLs) on an opposing side of the first die as the second die. The fan-out RDLs are electrically connected to the first die and the second die.
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公开(公告)号:US10074629B2
公开(公告)日:2018-09-11
申请号:US15379590
申请日:2016-12-15
发明人: Sung-Feng Yeh , Chen-Hua Yu , Ming-Fa Chen
IPC分类号: H01L23/538 , H01L25/065 , H01L23/31 , H01L23/00 , H01L25/00 , H01L21/48 , H01L21/56
CPC分类号: H01L25/0652 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L21/568 , H01L23/3114 , H01L23/3135 , H01L23/315 , H01L23/49816 , H01L23/5226 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/08 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/32 , H01L24/80 , H01L24/83 , H01L24/96 , H01L25/50 , H01L2224/04105 , H01L2224/08121 , H01L2224/08145 , H01L2224/12105 , H01L2224/19 , H01L2224/29076 , H01L2224/291 , H01L2224/29186 , H01L2224/32145 , H01L2224/32225 , H01L2224/32227 , H01L2224/73209 , H01L2224/73267 , H01L2224/80006 , H01L2224/80895 , H01L2224/80896 , H01L2224/8203 , H01L2224/83895 , H01L2224/83896 , H01L2224/92124 , H01L2224/97 , H01L2225/06524 , H01L2225/06548 , H01L2225/06555 , H01L2225/06582 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10338 , H01L2924/10339 , H01L2924/10342 , H01L2924/14 , H01L2924/141 , H01L2924/143 , H01L2924/1431 , H01L2924/1434 , H01L2924/1816 , H01L2924/18162 , H01L2224/80 , H01L2224/83005 , H01L2224/80001 , H01L2924/00014
摘要: An embodiment method for forming a semiconductor package includes attaching a first die to a first carrier, depositing a first isolation material around the first die, and after depositing the first isolation material, bonding a second die to the first die. Bonding the second die to the first die includes forming a dielectric-to-dielectric bond. The method further includes removing the first carrier and forming fan-out redistribution layers (RDLs) on an opposing side of the first die as the second die. The fan-out RDLs are electrically connected to the first die and the second die.
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公开(公告)号:US09659863B2
公开(公告)日:2017-05-23
申请号:US14671824
申请日:2015-03-27
发明人: Chen-Hua Yu , Hsien-Wei Chen , An-Jhih Su , Chi-Hsi Wu , Der-Chyang Yeh , Shih-Peng Tai
IPC分类号: H01L23/52 , H01L23/04 , H01L23/48 , H01L21/00 , H01L21/4763 , H01L23/528 , H01L21/56 , H01L21/311 , H01L21/768 , H01L21/02 , H01L23/535 , H01L23/00 , H01L23/538 , H01L23/525
CPC分类号: H01L23/528 , H01L21/02266 , H01L21/02271 , H01L21/0228 , H01L21/311 , H01L21/565 , H01L21/568 , H01L21/76802 , H01L21/76877 , H01L21/76895 , H01L23/525 , H01L23/5286 , H01L23/535 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10339 , H01L2924/10342 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436
摘要: Semiconductor device, multi-die packages, and methods of manufacture thereof are described. In an embodiment, a semiconductor device may include: first conductive pillars and second conductive pillars respectively aligned to a first row of first pins and a second row of second pins of a first die, the first pins and the second pins differing in function; a first insulating layer covering surfaces of the first conductive pillars and the second conductive pillars facing away from the first die; first pads disposed on a surface of the first insulating layer facing away from the first die, the first pads substantially aligned to the first conductive pillars; and first traces coupled to the first pads, the first traces extending over a portion of the first insulating layer covering the second conductive pillars.
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公开(公告)号:US09984969B2
公开(公告)日:2018-05-29
申请号:US15601734
申请日:2017-05-22
发明人: Chen-Hua Yu , Hsien-Wei Chen , An-Jhih Su , Chi-Hsi Wu , Der-Chyang Yeh , Shih-Peng Tai
IPC分类号: H01L23/52 , H01L23/04 , H01L23/48 , H01L21/00 , H01L21/4763 , H01L23/528 , H01L21/56 , H01L21/768 , H01L21/02 , H01L23/535 , H01L23/00 , H01L23/538 , H01L21/311 , H01L23/525
CPC分类号: H01L23/528 , H01L21/02266 , H01L21/02271 , H01L21/0228 , H01L21/311 , H01L21/565 , H01L21/568 , H01L21/76802 , H01L21/76877 , H01L21/76895 , H01L23/525 , H01L23/5286 , H01L23/535 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10339 , H01L2924/10342 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436
摘要: Semiconductor device, multi-die packages, and methods of manufacture thereof are described. In an embodiment, a semiconductor device may include: first conductive pillars and second conductive pillars respectively aligned to a first row of first pins and a second row of second pins of a first die, the first pins and the second pins differing in function; a first insulating layer covering surfaces of the first conductive pillars and the second conductive pillars facing away from the first die; first pads disposed on a surface of the first insulating layer facing away from the first die, the first pads substantially aligned to the first conductive pillars; and first traces coupled to the first pads, the first traces extending over a portion of the first insulating layer covering the second conductive pillars.
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公开(公告)号:US20170256487A1
公开(公告)日:2017-09-07
申请号:US15601734
申请日:2017-05-22
发明人: Chen-Hua Yu , Hsien-Wei Chen , An-Jhih Su , Chi-Hsi Wu , Der-Chyang Yeh , Shih-Peng Tai
IPC分类号: H01L23/528 , H01L21/02 , H01L21/56 , H01L21/768 , H01L23/00 , H01L23/535 , H01L23/538
CPC分类号: H01L23/528 , H01L21/02266 , H01L21/02271 , H01L21/0228 , H01L21/311 , H01L21/565 , H01L21/568 , H01L21/76802 , H01L21/76877 , H01L21/76895 , H01L23/525 , H01L23/5286 , H01L23/535 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10339 , H01L2924/10342 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436
摘要: Semiconductor device, multi-die packages, and methods of manufacture thereof are described. In an embodiment, a semiconductor device may include: first conductive pillars and second conductive pillars respectively aligned to a first row of first pins and a second row of second pins of a first die, the first pins and the second pins differing in function; a first insulating layer covering surfaces of the first conductive pillars and the second conductive pillars facing away from the first die; first pads disposed on a surface of the first insulating layer facing away from the first die, the first pads substantially aligned to the first conductive pillars; and first traces coupled to the first pads, the first traces extending over a portion of the first insulating layer covering the second conductive pillars.
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公开(公告)号:US20170125376A1
公开(公告)日:2017-05-04
申请号:US15379590
申请日:2016-12-15
发明人: Sung-Feng Yeh , Chen-Hua Yu , Ming-Fa Chen
IPC分类号: H01L25/065 , H01L23/31 , H01L21/56 , H01L25/00 , H01L21/48 , H01L23/538 , H01L23/00
CPC分类号: H01L25/0652 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L21/568 , H01L23/3114 , H01L23/3135 , H01L23/315 , H01L23/49816 , H01L23/5226 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/80 , H01L24/83 , H01L24/96 , H01L25/50 , H01L2224/04105 , H01L2224/08145 , H01L2224/12105 , H01L2224/19 , H01L2224/32145 , H01L2224/32225 , H01L2224/73209 , H01L2224/73267 , H01L2224/80006 , H01L2224/8203 , H01L2224/83896 , H01L2224/92124 , H01L2224/97 , H01L2225/06524 , H01L2225/06548 , H01L2225/06555 , H01L2225/06582 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10335 , H01L2924/10338 , H01L2924/10339 , H01L2924/10342 , H01L2924/14 , H01L2924/141 , H01L2924/143 , H01L2924/1431 , H01L2924/1434 , H01L2924/1816 , H01L2924/18162 , H01L2224/80 , H01L2224/83005
摘要: An embodiment method for forming a semiconductor package includes attaching a first die to a first carrier, depositing a first isolation material around the first die, and after depositing the first isolation material, bonding a second die to the first die. Bonding the second die to the first die includes forming a dielectric-to-dielectric bond. The method further includes removing the first carrier and forming fan-out redistribution layers (RDLs) on an opposing side of the first die as the second die. The fan-out RDLs are electrically connected to the first die and the second die.
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公开(公告)号:US09076931B2
公开(公告)日:2015-07-07
申请号:US13878178
申请日:2011-10-17
IPC分类号: H01L31/0264 , H01L33/46 , H01L33/44 , H01L33/40
CPC分类号: H01L33/46 , H01L33/405 , H01L33/44 , H01L2924/0002 , H01L2924/10336 , H01L2924/10339 , H01L2924/10342 , H01L2924/10345 , H01L2924/10349 , H01L2924/00
摘要: An optoelectronic component has a semiconductor body, a dielectric layer, a mirror and an additional layer. The semiconductor body has an active zone for generating electromagnetic radiation and an n-contact and a p-contact (1b) for electrical contacting purposes. The dielectric layer is disposed between the semiconductor body and the mirror. The additional layer is disposed between the semiconductor body and the dielectric layer. Furthermore, a method for producing a component of this type is provided.
摘要翻译: 光电子部件具有半导体本体,电介质层,反射镜和附加层。 半导体本体具有用于产生电磁辐射的有源区和用于电接触目的的n接触和p接触(1b)。 电介质层设置在半导体本体和反射镜之间。 附加层设置在半导体本体和电介质层之间。 此外,提供了这种类型的部件的制造方法。
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