公开(公告)号：US20160379951A9

公开(公告)日：2016-12-29

申请号：US14566185

申请日：2014-12-10

Applicant: Intel Corporation

Inventor： RAJASEKARAN SWAMINATHAN ,  RAVINDRANATH V. MAHAJAN

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/742 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/1132 ,  H01L2224/11418 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13355 ,  H01L2224/13357 ,  H01L2224/1336 ,  H01L2224/13387 ,  H01L2224/13411 ,  H01L2224/13447 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16503 ,  H01L2224/75264 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81222 ,  H01L2224/81409 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2924/01026 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/3494 ,  H05K2201/0341 ,  H05K2201/083 ,  H05K2201/10674 ,  H05K2203/104 ,  Y02P70/613 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/05381 ,  H01L2924/053 ,  H01L2924/0532 ,  H01L2924/01056

Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.

Abstract translation: 本公开涉及制造微电子封装的领域，其中分布在焊膏内的磁性颗粒可用于形成磁性金属间化合物互连。 金属间化合物互连可以暴露于磁场，磁场可以将焊料材料加热到回流温度，以附接包括微电子封装的微电子部件。

公开(公告)号：US08441118B2

公开(公告)日：2013-05-14

申请号：US12589409

申请日：2009-10-22

Applicant: Fay Hua

Inventor： Fay Hua

IPC: H01L23/04

CPC classification number: H01L23/49816 ,  H01L21/4846 ,  H01L21/486 ,  H01L23/36 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/1141 ,  H01L2224/11436 ,  H01L2224/1147 ,  H01L2224/1152 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13411 ,  H01L2224/13416 ,  H01L2224/13439 ,  H01L2224/13444 ,  H01L2224/13447 ,  H01L2224/13499 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/27436 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83

Abstract: A nano-sized metal particle composite includes a first metal that has a particle size of about 50 nanometer or smaller. A wire interconnect is in contact with a reflowed nanosolder and has the same metal or alloy composition as the reflowed nanosolder. A microelectronic package is also disclosed that uses the reflowed nanosolder composition. A method of assembling a microelectronic package includes preparing a wire interconnect template. A computing system includes a nanosolder composition coupled to a wire interconnect.

公开(公告)号：US20100047971A1

公开(公告)日：2010-02-25

申请号：US12589409

申请日：2009-10-22

Applicant: Fay Hua

Inventor： Fay Hua

IPC: H01L21/60 ,  H01L21/50

CPC classification number: H01L23/49816 ,  H01L21/4846 ,  H01L21/486 ,  H01L23/36 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/1141 ,  H01L2224/11436 ,  H01L2224/1147 ,  H01L2224/1152 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13411 ,  H01L2224/13416 ,  H01L2224/13439 ,  H01L2224/13444 ,  H01L2224/13447 ,  H01L2224/13499 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/27436 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83

Abstract: A nano-sized metal particle composite includes a first metal that has a particle size of about 50 nanometer or smaller. A wire interconnect is in contact with a reflowed nanosolder and has the same metal or alloy composition as the reflowed nanosolder. A microelectronic package is also disclosed that uses the reflowed nanosolder composition. A method of assembling a microelectronic package includes preparing a wire interconnect template. A computing system includes a nanosolder composition coupled to a wire interconnect.

Abstract translation: 纳米尺寸金属颗粒复合材料包括粒径为约50纳米或更小的第一金属。 电线互连与回流纳米溶剂接触并具有与回流纳米溶剂相同的金属或合金组成。 还公开了使用回流纳米涂料组合物的微电子封装。 组装微电子封装的方法包括制备导线互连模板。 计算系统包括耦合到电线互连的纳米涂料组合物。

公开(公告)号：US20160172320A1

公开(公告)日：2016-06-16

申请号：US14566185

申请日：2014-12-10

Applicant: Intel Corporation

Inventor： RAJASEKARAN SWAMINATHAN ,  RAVINDRANATH V. MAHAJAN

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/742 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/1132 ,  H01L2224/11418 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13355 ,  H01L2224/13357 ,  H01L2224/1336 ,  H01L2224/13387 ,  H01L2224/13411 ,  H01L2224/13447 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16503 ,  H01L2224/75264 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81222 ,  H01L2224/81409 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2924/01026 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/3494 ,  H05K2201/0341 ,  H05K2201/083 ,  H05K2201/10674 ,  H05K2203/104 ,  Y02P70/613 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/05381 ,  H01L2924/053 ,  H01L2924/0532 ,  H01L2924/01056

Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.

公开(公告)号：US20140328032A1

公开(公告)日：2014-11-06

申请号：US14267941

申请日：2014-05-02

Applicant: Infineon Technologies AG

Inventor： Frank Pueschner ,  Juergen Hoegerl ,  Thomas Spoettl

IPC: H05K1/02 ,  H01L23/00

CPC classification number: H05K1/028 ,  G06K19/07728 ,  G06K19/07749 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/32 ,  H01L24/95 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13309 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13318 ,  H01L2224/13324 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13393 ,  H01L2224/16238 ,  H01L2224/17106 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32227 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2924/12044 ,  H05K1/02 ,  H05K2201/2009 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/00 ,  H01L2924/014

Abstract: A chip arrangement may include: a flexible carrier; a first supporting structure and a second supporting structure for strengthening a region of the carrier, the first supporting structure being arranged on a first side of the carrier and the second supporting structure being arranged opposite from the first supporting structure on a second side of the carrier; and a chip arranged on the first side of the carrier, the chip being carried and supported by means of the supporting structures and by means of the carrier. The second supporting structure may extend at least by the same amount as the chip along the directions parallel to the surface of the carrier.

Abstract translation: 芯片布置可以包括：柔性载体; 第一支撑结构和用于加强载体的区域的第二支撑结构，所述第一支撑结构布置在所述载体的第一侧上，并且所述第二支撑结构在所述载体的第二侧上与所述第一支撑结构相对地布置 ; 以及布置在所述载体的第一侧上的芯片，所述芯片通过所述支撑结构并通过所述载体承载和支撑。 第二支撑结构可以沿着平行于载体表面的方向至少与芯片相同的量延伸。

公开(公告)号：US20090263214A1

公开(公告)日：2009-10-22

申请号：US12107504

申请日：2008-04-22

Applicant: Chien-Hsiun Lee ,  Chen-Shien Chen ,  Mirng-Ji Lii ,  Tjandra Winata Karta

Inventor： Chien-Hsiun Lee ,  Chen-Shien Chen ,  Mirng-Ji Lii ,  Tjandra Winata Karta

IPC: H01L21/67 ,  H01L23/15

CPC classification number: H01L24/97 ,  H01L21/486 ,  H01L21/67184 ,  H01L21/67207 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/75 ,  H01L24/81 ,  H01L25/0655 ,  H01L2221/68331 ,  H01L2221/68381 ,  H01L2224/13316 ,  H01L2224/16235 ,  H01L2224/75744 ,  H01L2224/81005 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/0105

Abstract: A silicon-based wafer such as a TSV interposer wafer having a first and second surfaces wherein a glass carrier is mounted on the second surface by a UV tape is held by a vacuum holder applied on the first surface and the glass carrier is removed from the silicon-based wafer by irradiating the UV tape with a UV light through the glass carrier. The silicon-based wafer is then flipped and placed onto a vacuum plate and secured to the vacuum plate by applying vacuum to the vacuum plate. The vacuum holder is then released from the silicon-based wafer leaving the silicon-based wafer secured to the vacuum plate for subsequent processing steps.

Abstract translation: 具有第一表面和第二表面的硅基晶片，其中玻璃载体通过UV带安装在第二表面上，由施加在第一表面上的真空保持器保持，玻璃载体从 硅基晶片，通过紫外光照射UV带通过玻璃载体。 然后将硅基晶片翻转并放置在真空板上并通过向真空板施加真空而固定到真空板。 然后将真空保持器从硅基晶片释放，留下固定到真空板的硅基晶片用于随后的处理步骤。

公开(公告)号：US06763585B2

公开(公告)日：2004-07-20

申请号：US10013716

申请日：2001-12-13

Applicant: Shinichi Suzuki

Inventor： Shinichi Suzuki

IPC: H01R4302

CPC classification number: H01L24/13 ,  H01L21/4853 ,  H01L21/4867 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/13316 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2924/0001 ,  H01L2924/00015 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/092 ,  H05K3/048 ,  H05K3/1258 ,  H05K3/245 ,  H05K2203/0514 ,  H05K2203/0568 ,  Y10T29/4921 ,  Y10T29/49211 ,  Y10T436/17 ,  Y10T436/170769 ,  Y10T436/173076 ,  Y10T436/175383 ,  H01L2924/00014 ,  H01L2224/1134

Abstract: A resist pattern in accordance with a predetermined pattern is formed on a substrate. Next, a bump resist mixed with a micro metallic powder is made thicker than the resist pattern and formed on the substrate formed with the resist pattern. Continuously, the bump resist on the resist pattern is removed in the bump resist. Next, the resist pattern is removed. As a result, a bump resist pattern corresponding to the predetermined pattern remains on the substrate. Furthermore, the resist component in this bump resist pattern is removed, thereby forming a micro bump (micro projecting electrode) 8 consisting of the micro metallic powder on the substrate.

Abstract translation: 根据预定图案的抗蚀剂图案形成在基板上。 接下来，将与微细金属粉末混合的凸块抗蚀剂制成比抗蚀剂图案更厚，并形成在形成有抗蚀剂图案的基板上。 连续地，在抗蚀剂图案中去除抗蚀剂图案上的凸块抗蚀剂。 接下来，去除抗蚀剂图案。 结果，对应于预定图案的凸块抗蚀剂图案残留在基板上。 此外，除去该凸块抗蚀图案中的抗蚀剂成分，由此在基板上形成由微细金属粉末构成的微凸起（微突起电极）8。

公开(公告)号：US09847308B2

公开(公告)日：2017-12-19

申请号：US14566185

申请日：2014-12-10

Applicant: Intel Corporation

Inventor： Rajasekaran Swaminathan ,  Ravindranath V. Mahajan

IPC: H01L23/00 ,  H01L23/498 ,  H05K3/34

CPC classification number: H01L24/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/742 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/1132 ,  H01L2224/11418 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13316 ,  H01L2224/13355 ,  H01L2224/13357 ,  H01L2224/1336 ,  H01L2224/13387 ,  H01L2224/13411 ,  H01L2224/13447 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16503 ,  H01L2224/75264 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81222 ,  H01L2224/81409 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2924/01026 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/3494 ,  H05K2201/0341 ,  H05K2201/083 ,  H05K2201/10674 ,  H05K2203/104 ,  Y02P70/613 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/05381 ,  H01L2924/053 ,  H01L2924/0532 ,  H01L2924/01056

Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.

公开(公告)号：US09591767B2

公开(公告)日：2017-03-07

申请号：US14290173

申请日：2014-05-29

Applicant: FUJIKURA LTD.

Inventor： Kazuhisa Itoi ,  Masahiro Okamoto

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/10 ,  H01L23/538 ,  H01L23/367 ,  H01L21/48 ,  H01L23/00 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K3/10 ,  H01L21/4857 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/02311 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05569 ,  H01L2224/08237 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11416 ,  H01L2224/11418 ,  H01L2224/12105 ,  H01L2224/13009 ,  H01L2224/1329 ,  H01L2224/13294 ,  H01L2224/13309 ,  H01L2224/13311 ,  H01L2224/13313 ,  H01L2224/13316 ,  H01L2224/13324 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/1339 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/2929 ,  H01L2224/32225 ,  H01L2224/73201 ,  H01L2224/73251 ,  H01L2224/73253 ,  H01L2224/80203 ,  H01L2224/80447 ,  H01L2224/80903 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/8185 ,  H01L2224/81862 ,  H01L2224/81907 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8349 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/9221 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/15153 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/186 ,  H05K3/0061 ,  H05K3/4602 ,  H05K3/4614 ,  H05K2201/0969 ,  H05K2201/10674 ,  Y10T29/49126 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/0635 ,  H01L2924/069 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/80 ,  H01L2224/16 ,  H01L2224/08 ,  H01L2224/32 ,  H01L2924/00

Abstract: A component built-in board comprises stacked therein a plurality of printed wiring bases having a wiring pattern and a via formed on/in a resin base thereof, and comprises an electronic component built in thereto, wherein at least a portion of the plurality of printed wiring bases include a thermal wiring in the wiring pattern and include a thermal via in the via, at least one of the plurality of printed wiring bases has formed therein an opening where the electronic component is built, and has formed therein a heat-conducting layer and closely attached to a surface on an opposite side to an electrode formation surface of the electronic component built in to the opening, and the electronic component is fixed in the opening by an adhesive layer stacked on the heat-conducting layer, via a hole formed in a region facing onto the opening of the heat-conducting layer.

Abstract translation: 一种组件内置板，其中堆叠有多个印刷布线基底，其具有形成在其树脂基底上的布线图案和通孔，并且包括内置于其中的电子部件，其中多个印刷的至少一部分 布线基底包括布线图案中的热布线，并且在通孔中包括热通孔，多个印刷布线基底中的至少一个在其中形成有电子部件构建的开口，并且在其中形成有导热层 并且紧贴在与内置于开口部的电子部件的电极形成面相反一侧的面上，电子部件通过形成有孔的层叠在导热层上的粘接层固定在开口部 在面向导热层的开口的区域中。

公开(公告)号：US20140268574A1

公开(公告)日：2014-09-18

申请号：US14290173

申请日：2014-05-29

Applicant: FUJIKURA LTD.

Inventor： Kazuhisa Itoi ,  Masahiro Okamoto

IPC: H05K1/02 ,  H05K3/10

CPC classification number: H05K3/10 ,  H01L21/4857 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/02311 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05569 ,  H01L2224/08237 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11416 ,  H01L2224/11418 ,  H01L2224/12105 ,  H01L2224/13009 ,  H01L2224/1329 ,  H01L2224/13294 ,  H01L2224/13309 ,  H01L2224/13311 ,  H01L2224/13313 ,  H01L2224/13316 ,  H01L2224/13324 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/1339 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/2929 ,  H01L2224/32225 ,  H01L2224/73201 ,  H01L2224/73251 ,  H01L2224/73253 ,  H01L2224/80203 ,  H01L2224/80447 ,  H01L2224/80903 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/8185 ,  H01L2224/81862 ,  H01L2224/81907 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8349 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/9221 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/15153 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/186 ,  H05K3/0061 ,  H05K3/4602 ,  H05K3/4614 ,  H05K2201/0969 ,  H05K2201/10674 ,  Y10T29/49126 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/0635 ,  H01L2924/069 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/80 ,  H01L2224/16 ,  H01L2224/08 ,  H01L2224/32 ,  H01L2924/00

Abstract: A component built-in board comprises stacked therein a plurality of printed wiring bases having a wiring pattern and a via formed on/in a resin base thereof, and comprises an electronic component built in thereto, wherein at least a portion of the plurality of printed wiring bases include a thermal wiring in the wiring pattern and include a thermal via in the via, at least one of the plurality of printed wiring bases has formed therein an opening where the electronic component is built, and has formed therein a heat-conducting layer and closely attached to a surface on an opposite side to an electrode formation surface of the electronic component built in to the opening, and the electronic component is fixed in the opening by an adhesive layer stacked on the heat-conducting layer, via a hole formed in a region facing onto the opening of the heat-conducting layer.

Abstract translation: 一种组件内置板，其中堆叠有多个印刷布线基底，其具有形成在其树脂基底上的布线图案和通孔，并且包括内置于其中的电子部件，其中多个印刷的至少一部分 布线基底包括布线图案中的热布线，并且在通孔中包括热通孔，多个印刷布线基底中的至少一个在其中形成有电子部件构建的开口，并且在其中形成有导热层 并且紧贴在与内置于开口部的电子部件的电极形成面相反一侧的面上，电子部件通过形成有孔的层叠在导热层上的粘接层固定在开口部 在面向导热层的开口的区域中。