公开(公告)号：US11990513B2

公开(公告)日：2024-05-21

申请号：US17988612

申请日：2022-11-16

申请人： Intel Corporation

发明人： Cory Bomberger ,  Anand Murthy ,  Susmita Ghose ,  Siddharth Chouksey

IPC分类号： H01L29/08 ,  H01L21/02 ,  H01L21/306 ,  H01L29/06 ,  H01L29/10 ,  H01L29/165 ,  H01L29/167 ,  H01L29/32 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L21/027 ,  H01L21/66

CPC分类号： H01L29/0847 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/30604 ,  H01L29/0673 ,  H01L29/1037 ,  H01L29/165 ,  H01L29/167 ,  H01L29/32 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/0276 ,  H01L21/30625 ,  H01L22/26

摘要： Gate-all-around integrated circuit structures having embedded GeSnB source or drain structures, and methods of fabricating gate-all-around integrated circuit structures having embedded GeSnB source or drain structures, are described. For example, an integrated circuit structure includes a vertical arrangement of horizontal nanowires above a fin, the fin including a defect modification layer on a first semiconductor layer, and a second semiconductor layer on the defect modification layer. A gate stack is around the vertical arrangement of horizontal nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of horizontal nanowires, and a second epitaxial source or drain structure is at a second end of the vertical arrangement of horizontal nanowires.

公开(公告)号：US20230369487A1

公开(公告)日：2023-11-16

申请号：US18226166

申请日：2023-07-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. ,  National Taiwan University

发明人： Fang-Liang LU ,  I-Hsieh Wong ,  Shih-Ya Lin ,  CheeWee Liu ,  Samuel C. Pan

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324 ,  H01L29/08 ,  H01L21/268 ,  H01L29/165 ,  H01L29/10 ,  H01L29/161 ,  H01L21/28 ,  H01L29/06

CPC分类号： H01L29/7848 ,  H01L29/665 ,  H01L21/02664 ,  H01L21/0245 ,  H01L21/324 ,  H01L29/0847 ,  H01L21/02532 ,  H01L21/268 ,  H01L29/165 ,  H01L21/02381 ,  H01L29/1033 ,  H01L29/161 ,  H01L21/28255 ,  H01L29/66651 ,  H01L21/02535 ,  H01L29/1054 ,  H01L21/02579 ,  H01L21/02576 ,  H01L29/0649

摘要： A semiconductor device includes a first layer that includes a first semiconductor material disposed on a semiconductor substrate, and a second layer of a second semiconductor material disposed on the first layer. The semiconductor substrate includes Si. The first semiconductor material and the second semiconductor material are different. The second semiconductor material is formed of an alloy including a first element and Sn. A surface region of an end portion of the second layer at both ends of the second layer has a higher concentration of Sn than an internal region of the end portion of the second layer. The surface region surrounds the internal region.

公开(公告)号：US11791158B2

公开(公告)日：2023-10-17

申请号：US17577113

申请日：2022-01-17

申请人： Applied Materials, Inc.

发明人： Chen-Ying Wu ,  Yi-Chiau Huang

IPC分类号： H01L21/02

CPC分类号： H01L21/02535 ,  H01L21/02532 ,  H01L21/02579

摘要： Methods for depositing a silicon germanium tin boron (SiGeSn:B) film on a substrate are described. The method comprises exposing a substrate to a precursor mixture comprising a boron precursor, a silicon precursor, a germanium precursor, and a tin precursor to form a boron silicon germanium tin (SiGeSn:B) film on the substrate.

公开(公告)号：US20170372884A1

公开(公告)日：2017-12-28

申请号：US15627189

申请日：2017-06-19

申请人： ASM IP Holding B.V.

发明人： Joe Margetis ,  John Tolle

IPC分类号： H01L21/02 ,  H01L21/67 ,  H01L21/768

CPC分类号： H01L21/02005 ,  H01L21/0245 ,  H01L21/02452 ,  H01L21/02502 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/0262 ,  H01L21/67167 ,  H01L21/7688 ,  H01L29/161

摘要： A process for forming a thick defect-free epitaxial layer is disclosed. The process may comprise forming a buffer layer and a sacrificial layer prior to forming the thick defect-free epitaxial layer. The sacrificial layer and the thick defect-free epitaxial layer may be formed of the same material and at the same process conditions.

公开(公告)号：US09793115B2

公开(公告)日：2017-10-17

申请号：US15203642

申请日：2016-07-06

申请人： ASM IP HOLDING, B.V.

发明人： John Tolle

IPC分类号： H01L21/20 ,  H01L21/02 ,  H01L31/0745 ,  H01L31/18 ,  H01L29/165 ,  C30B25/18 ,  C30B29/52 ,  H01L29/161

CPC分类号： H01L21/02535 ,  C30B25/183 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/161 ,  H01L29/165 ,  H01L31/0745 ,  H01L31/1812 ,  Y02E10/50

摘要： Methods of forming germanium-tin films using germane as a precursor are disclosed. Exemplary methods include growing films including germanium and tin in an epitaxial chemical vapor deposition reactor, wherein a ratio of a tin precursor to germane is less than 0.1. Also disclosed are structures and devices including germanium-tin films formed using the methods described herein.

公开(公告)号：US09735235B2

公开(公告)日：2017-08-15

申请号：US15215609

申请日：2016-07-21

申请人： UNITED MICROELECTRONICS CORP.

发明人： Tsai-Yu Wen ,  Chin-Sheng Yang ,  Chun-Jen Chen ,  Tsuo-Wen Lu ,  Yu-Ren Wang

IPC分类号： H01L21/02 ,  H01L29/06 ,  H01L21/306 ,  H01L29/161 ,  H01L21/316 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/165

CPC分类号： H01L29/0673 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02236 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02452 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02603 ,  H01L21/02612 ,  H01L21/02639 ,  H01L21/02664 ,  H01L21/30604 ,  H01L21/31658 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66439 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785

摘要： A method of forming a nanowire includes providing a substrate. The substrate is etched to form at least one fin. Subsequently, a first epitaxial layer is formed on an upper portion of the fin. Later, an undercut is formed on a middle portion the fin. A second epitaxial layer is formed to fill into the undercut. Finally, the fin, the first epitaxial layer and the second epitaxial layer are oxidized to condense the first epitaxial layer and the second epitaxial layer into a germanium-containing nanowire.

公开(公告)号：US09525031B2

公开(公告)日：2016-12-20

申请号：US14208353

申请日：2014-03-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tsung-Hsing Yu ,  Ken-Ichi Goto ,  Chia-Wen Liu ,  Yeh Hsu

IPC分类号： H01L29/165 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L29/161 ,  H01L21/02

CPC分类号： H01L29/165 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02535 ,  H01L29/105 ,  H01L29/1054 ,  H01L29/1083 ,  H01L29/161 ,  H01L29/6659 ,  H01L29/66651 ,  H01L29/7833

摘要： Some embodiments of the present disclosure relate to an epitaxially grown replacement channel region within a transistor, which mitigates the variations within the channel of the transistor due to fluctuations in the manufacturing processes. The replacement channel region is formed by recessing source/drain and channel regions of the semiconductor substrate, and epitaxially growing a replacement channel region within the recess, which comprises epitaxially growing a lower epitaxial channel region over a bottom surface of the recess, and epitaxially growing an upper epitaxial channel region over a bottom surface of the recess. The lower epitaxial channel region retards dopant back diffusion from the upper epitaxial channel region, resulting in a steep retrograde dopant profile within the replacement channel region. The upper epitaxial channel region increases carrier mobility within the channel. The replacement channel region provides improved drive current, thereby enabling better performance and higher yield.

摘要翻译： 本公开的一些实施例涉及晶体管内的外延生长的替换沟道区，其由于制造工艺的波动而减轻晶体管的沟道内的变化。 替换通道区域通过使半导体衬底的源极/漏极和沟道区域凹陷形成，并且在凹槽内外延生长置换沟道区域，其包括在凹部的底表面上外延生长下部外延沟道区域，并且外延生长 在所述凹部的底表面上方的上部外延沟道区域。 下部外延沟道区域从上部外延沟道区域延迟掺杂剂反向扩散，导致替代沟道区域内的陡峭的逆向掺杂物分布。 上部外延沟道区增加了沟道内的载流子迁移率。 替代通道区域提供改善的驱动电流，从而实现更好的性能和更高的产量。

公开(公告)号：US09245805B2

公开(公告)日：2016-01-26

申请号：US12831903

申请日：2010-07-07

申请人： Chih Chieh Yeh ,  Chih-Sheng Chang ,  Clement Hsingjen Wann

发明人： Chih Chieh Yeh ,  Chih-Sheng Chang ,  Clement Hsingjen Wann

IPC分类号： H01L21/70 ,  H01L27/088 ,  H01L29/78 ,  H01L29/20 ,  H01L21/02 ,  H01L29/06 ,  H01L21/8238 ,  H01L29/66

CPC分类号： H01L21/8256 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L29/0847 ,  H01L29/6681 ,  H01L29/7848

摘要： An integrated circuit structure includes an n-type fin field effect transistor (FinFET) and a p-type FinFET. The n-type FinFET includes a first germanium fin over a substrate; a first gate dielectric on a top surface and sidewalls of the first germanium fin; and a first gate electrode on the first gate dielectric. The p-type FinFET includes a second germanium fin over the substrate; a second gate dielectric on a top surface and sidewalls of the second germanium fin; and a second gate electrode on the second gate dielectric. The first gate electrode and the second gate electrode are formed of a same material having a work function close to an intrinsic energy level of germanium.

摘要翻译： 集成电路结构包括n型鳍式场效应晶体管（FinFET）和p型FinFET。 n型FinFET包括在衬底上的第一锗鳍; 顶表面上的第一栅电介质和第一锗鳍的侧壁; 以及在第一栅极电介质上的第一栅电极。 p型FinFET在衬底上包括第二个锗鳍; 在顶表面上的第二栅电介质和第二锗鳍的侧壁; 和在第二栅极电介质上的第二栅电极。 第一栅电极和第二栅极由具有接近锗的固有能级的功函数的相同材料形成。

公开(公告)号：US20150332921A1

公开(公告)日：2015-11-19

申请号：US14483169

申请日：2014-09-11

申请人： NATIONAL TSING HUA UNIVERSITY

发明人： Ming-Chang LEE ,  Chih-Kuo TSENG

IPC分类号： H01L21/02 ,  H01L29/10 ,  H01L29/36

CPC分类号： H01L21/02667 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02452 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02642 ,  H01L29/1029 ,  H01L29/1054 ,  H01L29/36

摘要： The present disclosure provides a carrier channel with an element concentration gradient distribution. The carrier channel includes a substrate and a carrier channel structure. The carrier channel structure is stacked on the substrate, wherein a ratio of a height and a width of the carrier channel is greater than 1, and the carrier channel is crystallized from the contact surface by a rapid melting growth process, thus the carrier channel structure has the element concentration gradient distribution.

摘要翻译： 本公开提供了具有元素浓度梯度分布的载波信道。 载体通道包括基底和载体通道结构。 载体沟道结构层叠在基板上，其中载流子通道的高度和宽度的比率大于1，并且通过快速熔融生长工艺从载体通道从接触表面结晶，因此载流子通道结构 具有元素浓度梯度分布。

公开(公告)号：US20150048485A1

公开(公告)日：2015-02-19

申请号：US13966782

申请日：2013-08-14

申请人： ASM IP Holding B.V.

发明人： John Tolle

IPC分类号： H01L21/02 ,  H01L29/161

CPC分类号： H01L21/02532 ,  C30B25/183 ,  C30B29/52 ,  H01L21/02535 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/161 ,  H01L29/165

摘要： Methods of forming germanium-tin films using germane as a precursor are disclosed. Exemplary methods include growing films including germanium and tin in an epitaxial chemical vapor deposition reactor, wherein a ratio of a tin precursor to germane is less than 0.1. Also disclosed are structures and devices including germanium-tin films formed using the methods described herein.

摘要翻译： 公开了使用锗烷作为前体形成锗 - 锡膜的方法。 示例性方法包括在外延化学气相沉积反应器中生长包括锗和锡的膜，其中锡前体与锗烷的比例小于0.1。 还公开了包括使用本文所述的方法形成的锗 - 锡膜的结构和装置。