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    Recess and epitaxial layer to improve transistor performance
    3.
    发明授权
    Recess and epitaxial layer to improve transistor performance 有权
    凹槽和外延层，以提高晶体管的性能

    公开(公告)号：US09536746B2

    公开(公告)日：2017-01-03

    申请号：US14208438

    申请日：2014-03-13

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Yeh Hsu ,  Chia-Wen Liu ,  Tsung-Hsing Yu ,  Ken-Ichi Goto ,  Shih-Syuan Huang

    IPC分类号： H01L29/78 ,  H01L21/306 ,  H01L21/28 ,  H01L29/66 ,  H01L29/10 ,  H01L21/3065 ,  H01L29/165

    CPC分类号： H01L21/30604 ,  H01L21/28123 ,  H01L21/3065 ,  H01L29/1037 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66651 ,  H01L29/66795 ,  H01L29/785

    摘要： Some embodiments of the present disclosure relate to a semiconductor device configured to mitigate against parasitic coupling while maintaining threshold voltage control for comparatively narrow transistors. In some embodiments, a semiconductor device formed on a semiconductor substrate. The semiconductor device comprises a channel comprising an epitaxial layer that forms an outgrowth above the surface of the semiconductor substrate, and a gate material formed over the epitaxial layer. In some embodiments, a method of forming a semiconductor device is disclosed. The method comprises etching the surface of a semiconductor substrate to form a recess between first and second isolation structures, forming an epitaxial layer within the recess that forms an outgrowth above the surface of the semiconductor substrate, and forming a gate material over the epitaxial layer. Other embodiments are also disclosed.

    摘要翻译： 本公开的一些实施例涉及被配置为抵抗寄生耦合的半导体器件，同时保持对比较窄的晶体管的阈值电压控制。 在一些实施例中，形成在半导体衬底上的半导体器件。 半导体器件包括沟道，其包括在半导体衬底的表面上形成生长的外延层，以及形成在外延层上的栅极材料。 在一些实施例中，公开了一种形成半导体器件的方法。 该方法包括蚀刻半导体衬底的表面以在第一和第二隔离结构之间形成凹陷，在凹槽内形成外延层，其在半导体衬底的表面上形成生长，并在外延层上形成栅极材料。 还公开了其他实施例。

    RECESS AND EPITAXIAL LAYER TO IMPROVE TRANSISTOR PERFORMANCE
    5.
    发明申请
    RECESS AND EPITAXIAL LAYER TO IMPROVE TRANSISTOR PERFORMANCE 有权
    回收和外延层提高晶体管性能

    公开(公告)号：US20150263171A1

    公开(公告)日：2015-09-17

    申请号：US14208438

    申请日：2014-03-13

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Yeh Hsu ,  Chia-Wen Liu ,  Tsung-Hsing Yu ,  Ken-Ichi Goto ,  Shih-Syuan Huang

    IPC分类号： H01L29/78 ,  H01L21/263 ,  H01L29/66 ,  H01L21/306

    CPC分类号： H01L21/30604 ,  H01L21/28123 ,  H01L21/3065 ,  H01L29/1037 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66651 ,  H01L29/66795 ,  H01L29/785

    摘要： Some embodiments of the present disclosure relate to a semiconductor device configured to mitigate against parasitic coupling while maintaining threshold voltage control for comparatively narrow transistors. In some embodiments, a semiconductor device formed on a semiconductor substrate. The semiconductor device comprises a channel comprising an epitaxial layer that forms an outgrowth above the surface of the semiconductor substrate, and a gate material formed over the epitaxial layer. In some embodiments, a method of forming a semiconductor device is disclosed. The method comprises etching the surface of a semiconductor substrate to form a recess between first and second isolation structures, forming an epitaxial layer within the recess that forms an outgrowth above the surface of the semiconductor substrate, and forming a gate material over the epitaxial layer. Other embodiments are also disclosed.

    摘要翻译： 本公开的一些实施例涉及被配置为抵抗寄生耦合的半导体器件，同时保持对比较窄的晶体管的阈值电压控制。 在一些实施例中，形成在半导体衬底上的半导体器件。 半导体器件包括沟道，其包括在半导体衬底的表面上形成生长的外延层，以及形成在外延层上的栅极材料。 在一些实施例中，公开了一种形成半导体器件的方法。 该方法包括蚀刻半导体衬底的表面以在第一和第二隔离结构之间形成凹陷，在凹槽内形成外延层，其在半导体衬底的表面上形成生长，并在外延层上形成栅极材料。 还公开了其他实施例。

    Epitaxial channel
    9.
    发明授权
    Epitaxial channel 有权
    外延通道

    公开(公告)号：US09525031B2

    公开(公告)日：2016-12-20

    申请号：US14208353

    申请日：2014-03-13

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Tsung-Hsing Yu ,  Ken-Ichi Goto ,  Chia-Wen Liu ,  Yeh Hsu

    IPC分类号： H01L29/165 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L29/161 ,  H01L21/02

    CPC分类号： H01L29/165 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02535 ,  H01L29/105 ,  H01L29/1054 ,  H01L29/1083 ,  H01L29/161 ,  H01L29/6659 ,  H01L29/66651 ,  H01L29/7833

    摘要： Some embodiments of the present disclosure relate to an epitaxially grown replacement channel region within a transistor, which mitigates the variations within the channel of the transistor due to fluctuations in the manufacturing processes. The replacement channel region is formed by recessing source/drain and channel regions of the semiconductor substrate, and epitaxially growing a replacement channel region within the recess, which comprises epitaxially growing a lower epitaxial channel region over a bottom surface of the recess, and epitaxially growing an upper epitaxial channel region over a bottom surface of the recess. The lower epitaxial channel region retards dopant back diffusion from the upper epitaxial channel region, resulting in a steep retrograde dopant profile within the replacement channel region. The upper epitaxial channel region increases carrier mobility within the channel. The replacement channel region provides improved drive current, thereby enabling better performance and higher yield.

    摘要翻译： 本公开的一些实施例涉及晶体管内的外延生长的替换沟道区，其由于制造工艺的波动而减轻晶体管的沟道内的变化。 替换通道区域通过使半导体衬底的源极/漏极和沟道区域凹陷形成，并且在凹槽内外延生长置换沟道区域，其包括在凹部的底表面上外延生长下部外延沟道区域，并且外延生长 在所述凹部的底表面上方的上部外延沟道区域。 下部外延沟道区域从上部外延沟道区域延迟掺杂剂反向扩散，导致替代沟道区域内的陡峭的逆向掺杂物分布。 上部外延沟道区增加了沟道内的载流子迁移率。 替代通道区域提供改善的驱动电流，从而实现更好的性能和更高的产量。