公开(公告)号：US20240234001A1

公开(公告)日：2024-07-11

申请号：US18558667

申请日：2022-05-03

申请人： EnaChip inc.

发明人： Trifon Liakopoulos ,  Amrit Panda

IPC分类号： H01F17/00 ,  H01F10/14 ,  H01F41/26 ,  H01F41/34

CPC分类号： H01F17/0006 ,  H01F10/14 ,  H01F41/26 ,  H01F41/34 ,  H01F2017/0066

摘要： A micromagnetic device and method of forming the same. In one embodiment, the micromagnetic device includes a seed layer formed over a substrate, and a patterned insulating layer and a patterned protective layer formed over the seed layer providing a first exposed section of the seed layer. The micromagnetic device also includes a first electroplated layer segment electroplated over the first exposed section of the seed layer and laterally over sections of the patterned insulating layer and the patterned protective layer.

公开(公告)号：US12010925B2

公开(公告)日：2024-06-11

申请号：US18064367

申请日：2022-12-12

申请人： Samsung Electronics Co., Ltd.

发明人： Ung Hwan Pi ,  Dongkyu Lee

IPC分类号： H10N50/80 ,  G11C11/16 ,  H01F10/32 ,  H01F41/34 ,  H10B61/00 ,  H10N50/01 ,  H10N50/85

CPC分类号： H10N50/80 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H01F10/3254 ,  H01F10/329 ,  H01F41/34 ,  H10B61/00 ,  H10N50/01 ,  H10N50/85

摘要： A magnetic memory device includes a conductive line extending in a first direction, a magnetic line extending in a second direction intersecting the first direction on the conductive line, the magnetic line intersecting the conductive line, and a magnetic pattern disposed between the conductive line and the magnetic line. The magnetic pattern has first sidewalls opposite to each other in the first direction, and second sidewalls opposite to each other in the second direction. The second sidewalls of the magnetic pattern are aligned with sidewalls of the conductive line, respectively.

公开(公告)号：US20240177927A1

公开(公告)日：2024-05-30

申请号：US18433052

申请日：2024-02-05

申请人： Richard Thuss ,  Lawrence Livermore National Security, LLC

发明人： Alexander Baker ,  Scott K. McCall ,  Harry B. Radousky ,  Nathan Woollett ,  Richard Thuss

IPC分类号： H01F41/14 ,  B22F10/25 ,  B22F10/38 ,  B32B1/00 ,  B32B3/02 ,  B32B3/26 ,  B32B3/30 ,  B32B5/14 ,  B32B5/16 ,  B32B7/025 ,  B32B7/027 ,  B32B15/04 ,  B33Y80/00 ,  C23C4/01 ,  C23C4/04 ,  C23C4/06 ,  C23C4/08 ,  C23C4/12 ,  C23C24/00 ,  C23C24/04 ,  C23C30/00 ,  H01F7/00 ,  H01F7/02 ,  H01F41/20 ,  H01F41/30 ,  H01F41/34 ,  H10N10/00 ,  H10N10/80 ,  H10N10/857 ,  H10N15/00 ,  H10N30/00 ,  H10N30/01 ,  H10N30/074 ,  H10N30/076 ,  H10N60/00 ,  H10N60/01 ,  B33Y10/00 ,  H10N10/01

CPC分类号： H01F41/14 ,  B22F10/25 ,  B22F10/38 ,  B32B1/00 ,  B32B3/02 ,  B32B3/26 ,  B32B3/30 ,  B32B5/14 ,  B32B5/142 ,  B32B5/145 ,  B32B5/16 ,  B32B7/025 ,  B32B7/027 ,  B32B15/04 ,  B32B15/043 ,  B33Y80/00 ,  C23C4/01 ,  C23C4/04 ,  C23C4/06 ,  C23C4/08 ,  C23C4/12 ,  C23C24/00 ,  C23C24/04 ,  C23C30/00 ,  C23C30/005 ,  H01F7/00 ,  H01F7/02 ,  H01F41/20 ,  H01F41/30 ,  H01F41/34 ,  H10N10/00 ,  H10N10/80 ,  H10N10/857 ,  H10N15/00 ,  H10N30/00 ,  H10N30/01 ,  H10N30/074 ,  H10N30/076 ,  H10N30/1051 ,  H10N60/00 ,  H10N60/01 ,  B22F2999/00 ,  B33Y10/00 ,  C22C2202/00 ,  H10N10/01 ,  Y10T428/12389 ,  Y10T428/12396 ,  Y10T428/12458 ,  Y10T428/12493 ,  Y10T428/12528 ,  Y10T428/12535 ,  Y10T428/12681 ,  Y10T428/24942 ,  Y10T428/249921 ,  Y10T428/26

摘要： A method, in accordance with one embodiment, includes forming an array of structures from a raw material via cold spray. Each of the structures is characterized by having a defined feature size in at least one dimension of less than 100 microns as measured in a plane of deposition of the structure, at least 90% of a theoretical density of the raw material, and essentially the same functional properties as the raw material. A method, in accordance with another embodiment, includes positioning a mask between a cold spray nozzle and a substrate, and forming a structure on the substrate by cold spraying a raw material from the cold spray nozzle. The structure has a shape corresponding to an aperture in the mask.

公开(公告)号：US11889769B2

公开(公告)日：2024-01-30

申请号：US17872520

申请日：2022-07-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Che Ku ,  Harry-Hak-Lay Chuang ,  Hung Cho Wang ,  Tsun Chung Tu ,  Jiunyu Tsai ,  Sheng-Huang Huang

IPC分类号： H10N50/80 ,  H01F10/32 ,  H01F41/34 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H10B61/00 ,  H10N50/01 ,  G11C11/16

CPC分类号： H10N50/80 ,  H01F10/3254 ,  H01F41/34 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/5283 ,  H10B61/22 ,  H10N50/01 ,  G11C11/161

摘要： The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a magnetic tunnel junction arranged between a bottom electrode and a top electrode and surrounded by a dielectric structure disposed over a substrate. The top electrode has a width that decreases as a height of the top electrode increases. A bottom electrode via couples the bottom electrode to a lower interconnect. An upper interconnect structure is coupled to the top electrode. The upper interconnect structure has a vertically extending surface that is disposed laterally between first and second outermost sidewalls of the upper interconnect structure and along a sidewall of the top electrode. The vertically extending surface and the first outermost sidewall are connected to a bottom surface of the upper interconnect structure that is vertically below a top of the top electrode.

公开(公告)号：US11864467B2

公开(公告)日：2024-01-02

申请号：US17461132

申请日：2021-08-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Jung-Tang Wu ,  Wu Meng Yu ,  Szu-Hua Wu ,  Chin-Szu Lee ,  Han-Ting Tsai ,  Yu-Jen Chien

IPC分类号： H10N50/01 ,  H01F41/34 ,  G11C11/16 ,  H01F10/32 ,  H10B61/00 ,  H10N50/80

CPC分类号： H10N50/01 ,  G11C11/161 ,  H01F10/3254 ,  H01F41/34 ,  H10B61/00 ,  H10N50/80

摘要： A top electrode of a magnetoresistive random access memory (MRAM) device over a magnetic tunnel junction (MTJ) is formed using a film of titanium nitride oriented in a (111) crystal structure rather than a top electrode which uses tantalum, tantalum nitride, and/or a multilayer including tantalum and tantalum nitride.

公开(公告)号：US20230165157A1

公开(公告)日：2023-05-25

申请号：US18158086

申请日：2023-01-23

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi Yang ,  Dongna Shen ,  Yu-Jen Wang

IPC分类号： H10N50/01 ,  H01F41/34 ,  H01F10/32 ,  G11C11/16 ,  H10N50/10 ,  H10N50/80

CPC分类号： H10N50/01 ,  H01F41/34 ,  H01F10/3254 ,  G11C11/161 ,  H10N50/10 ,  H10N50/80

摘要： A magnetic tunneling junction (MTJ) structure comprises a pinned layer on a bottom electrode. a barrier layer on the pinned layer, wherein a second metal re-deposition layer is on sidewalls of the barrier layer and the pinned layer, a free layer on the barrier layer wherein the free layer has a first width smaller than a second width of the pinned layer, a top electrode on the free layer having a same first width as the free layer wherein a first metal re-deposition layer is on sidewalls of the free layer and top electrode, and dielectric spacers on sidewalls of the free layer and top electrode covering the first metal re-deposition layer wherein the free layer and the top electrode together with the dielectric spacers have a same the second width as the pinned layer wherein the dielectric spacers prevent shorting between the first and second metal re-deposition layers.

公开(公告)号：US20190221365A1

公开(公告)日：2019-07-18

申请号：US16335075

申请日：2017-08-24

申请人： Apple Inc.

发明人： David P. Cappabianca ,  Joseph T. DiBene, II ,  Shawn Searles ,  Le Wang ,  Yizhang Yang ,  Sean Cian O'Mathuna ,  Santosh Kulkarni ,  Paul McCloskey ,  Zoran Pavlovic ,  William Lawton ,  Graeme Maxwell ,  Joseph O'Brien ,  Hugh Charles Smiddy

IPC分类号： H01F41/34 ,  H01F17/00 ,  H01F19/00 ,  H01L49/02

CPC分类号： H01F41/34 ,  H01F17/0006 ,  H01F19/00 ,  H01F2017/008 ,  H01L28/10

摘要： An inductor is disclosed, including a first wire, a non-conductive material, and a shell. The non-conductive material may cover the first wire, with a portion of each end of the first wire uncovered. The shell may include a top portion and a bottom portion and include at least one magnetized layer and at least one gap between the first portion and the second portion. The shell may also surround a portion of the non-conductive material.

公开(公告)号：US20190206749A1

公开(公告)日：2019-07-04

申请号：US15859465

申请日：2017-12-30

申请人： Spin Memory, Inc.

发明人： Thomas D. Boone ,  Pradeep Manandhar

IPC分类号： H01L21/66 ,  H01L43/12 ,  H01L21/027 ,  H01L21/768 ,  H01L43/08 ,  G11C11/16 ,  H01L43/02 ,  H01L27/22 ,  H01F10/32 ,  G11C29/08 ,  H01F41/34

CPC分类号： H01L22/34 ,  G11C11/161 ,  G11C11/1675 ,  G11C29/08 ,  G11C2029/0403 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3286 ,  H01F10/329 ,  H01F41/34 ,  H01L21/0277 ,  H01L21/76877 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

摘要： A method for testing individual memory elements or sets of memory elements of an array of magnetic memory elements. The method involves forming a mask such as photoresist mask over an array memory elements. The mask is configured with an opening over each of the selected memory elements to be tested. The mask can be formed of photoresist which can be patterned by focused electron beam exposure to form opening at features sizes smaller than those available using standard photolithographic processes. An electrically conductive material is deposited over the mask and into the openings in the mask to make electrical contact with the selected memory element or memory elements to be tested. Then, electrical connection can be made with the electrically conductive material to test the selected one or more magnetic memory elements.

公开(公告)号：US20190206619A1

公开(公告)日：2019-07-04

申请号：US16291807

申请日：2019-03-04

申请人： International Business Machines Corporation

发明人： Hariklia Deligianni ,  Bruce B. Doris ,  Eugene J. O'Sullivan ,  Naigang Wang

IPC分类号： H01F41/14 ,  H01F41/34

CPC分类号： H01F41/14 ,  H01F17/0033 ,  H01F17/04 ,  H01F41/34 ,  H01F2017/0066

摘要： A method for fabricating a magnetic material stack on a substrate, comprises forming a first dielectric layer, forming a first magnetic material layer on the first dielectric layer, forming at least a second dielectric layer on the first magnetic material layer and forming at least a second magnetic material layer on the second dielectric layer. During one or more of the forming steps, a surface smoothing operation is performed to remove at least a portion of surface roughness on the layer being formed.

公开(公告)号：US09660185B2

公开(公告)日：2017-05-23

申请号：US15157120

申请日：2016-05-17

申请人： Applied Materials, Inc.

发明人： Roman Gouk ,  Steven Verhaverbeke ,  Alexander Kontos ,  Adolph Miller Allen ,  Kevin Moraes

IPC分类号： B44C1/22 ,  H01L43/12 ,  G11B5/74 ,  G11B5/855 ,  H01F41/34 ,  H01L21/285 ,  H01L21/308

CPC分类号： H01L43/12 ,  G11B5/746 ,  G11B5/855 ,  G11C11/16 ,  H01F41/34 ,  H01L21/2855 ,  H01L21/3081

摘要： A method and apparatus for forming a magnetic layer having a pattern of magnetic properties on a substrate is described. The method includes using a metal nitride hardmask layer to pattern the magnetic layer by plasma exposure. The metal nitride layer is patterned using a nanoimprint patterning process with a silicon oxide pattern negative material. The pattern is developed in the metal nitride using a halogen and oxygen containing remote plasma, and is removed after plasma exposure using a caustic wet strip process. All processing is done at low temperatures to avoid thermal damage to magnetic materials.