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    MEMORY DEVICE AND METHOD FOR THERMOELECTRIC HEAT CONFINEMENT
    2.
    发明申请
    MEMORY DEVICE AND METHOD FOR THERMOELECTRIC HEAT CONFINEMENT 有权
    用于热电加热限制的存储器件和方法

    公开(公告)号：US20160104529A1

    公开(公告)日：2016-04-14

    申请号：US14819475

    申请日：2015-08-06

    申请人： International Business Machines Corporation

    发明人： Aravinthan Athmanathan ,  Daniel Krebs

    IPC分类号： G11C13/00

    CPC分类号： G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/008 ,  G11C2213/50 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1286 ,  H01L45/1293 ,  H01L45/14

    摘要： A memory device for thermoelectric heat confinement and method for producing same. The memory device includes a plurality of phase-change memory cells, wherein each of the phase-change memory cells has a first electrode, a second electrode and a phase-change material. The first electrode and the phase-change material are arranged such that a surface normal of a dominating interface for a current flow between the first electrode and the phase-change material points on one side to the phase-change material of the phase-change memory cell and on an opposite side to a phase-change material of a neighboring phase-change memory cell. A method for producing a memory device for thermoelectric heat confinement is also provided.

    摘要翻译： 一种用于热电热限制的记忆装置及其制造方法。 存储器件包括多个相变存储器单元，其中每个相变存储单元具有第一电极，第二电极和相变材料。 第一电极和相变材料被布置成使得用于第一电极和相变材料之间的电流的主导界面的表面法线在一侧指向相变存储器的相变材料 并且与相邻相变存储器单元的相变材料的相反侧。 还提供了一种用于制造用于热电热限制的存储器件的方法。

    Memory device and method for thermoelectric heat confinement
    4.
    发明授权
    Memory device and method for thermoelectric heat confinement 有权
    用于热电热限制的存储器件和方法

    公开(公告)号：US09548110B2

    公开(公告)日：2017-01-17

    申请号：US14819475

    申请日：2015-08-06

    申请人： International Business Machines Corporation

    发明人： Aravinthan Athmanathan ,  Daniel Krebs

    IPC分类号： G11C11/00 ,  G11C13/00 ,  H01L45/00

    CPC分类号： G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/008 ,  G11C2213/50 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1286 ,  H01L45/1293 ,  H01L45/14

    摘要： A memory device for thermoelectric heat confinement and method for producing same. The memory device includes a plurality of phase-change memory cells, wherein each of the phase-change memory cells has a first electrode, a second electrode and a phase-change material. The first electrode and the phase-change material are arranged such that a surface normal of a dominating interface for a current flow between the first electrode and the phase-change material points on one side to the phase-change material of the phase-change memory cell and on an opposite side to a phase-change material of a neighboring phase-change memory cell. A method for producing a memory device for thermoelectric heat confinement is also provided.

    摘要翻译： 一种用于热电热限制的记忆装置及其制造方法。 存储器件包括多个相变存储器单元，其中每个相变存储单元具有第一电极，第二电极和相变材料。 第一电极和相变材料被布置成使得用于第一电极和相变材料之间的电流的主导界面的表面法线在一侧指向相变存储器的相变材料 并且与相邻相变存储器单元的相变材料的相反侧。 还提供了一种用于制造用于热电热限制的存储器件的方法。

    Three-dimensional two-terminal memory with enhanced electric field and segmented interconnects
    5.
    发明授权
    Three-dimensional two-terminal memory with enhanced electric field and segmented interconnects 有权
    具有增强型电场和分段互连的三维二端存储器

    公开(公告)号：US09564587B1

    公开(公告)日：2017-02-07

    申请号：US14588202

    申请日：2014-12-31

    申请人： Crossbar Inc.

    发明人： Sung Hyun Jo ,  Kuk-Hwan Kim ,  Joanna Bettinger

    IPC分类号： G11C13/00 ,  H01L45/00 ,  G11C5/06

    CPC分类号： H01L45/1608 ,  G11C5/06 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C2213/50 ,  G11C2213/72 ,  G11C2213/76 ,  G11C2213/77 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/249 ,  H01L45/085 ,  H01L45/122 ,  H01L45/1226 ,  H01L45/145 ,  H01L45/146 ,  H01L45/148 ,  H01L45/16

    摘要： Providing for three-dimensional memory cells having enhanced electric field characteristics and/or memory cells located at broken interconnects is described herein. By way of example, a two-terminal memory cell can be constructed from a layered stack of materials, where respective layers are arranged along a direction that forms a non-zero angle to a normal direction of a substrate surface upon which the layered stack of materials is constructed. In some aspects, the direction can be orthogonal to or substantially orthogonal to the normal direction. In other aspects, the direction can be less than orthogonal to the normal direction. Where an internal angle of the memory cell forms a non-orthogonal angle, an enhanced electric field or current density can result, providing improved switching times and memory performance.

    摘要翻译： 本文描述了提供具有增强的电场特性的三维存储单元和/或位于断开的互连处的存储单元。 作为示例，可以从层叠的材料层构造双端存储单元，其中各层沿着与衬底表面的法线方向形成非零角度的方向排列，在该衬底表面上层叠叠层 材料建成。 在一些方面，方向可以与法线方向正交或基本正交。 在其他方面，方向可以小于正交方向。 在存储单元的内部角度形成非正交角度的情况下，可以产生增强的电场或电流密度，从而提供改进的开关时间和存储器性能。

    THREE-DIMENSIONAL OBLIQUE TWO-TERMINAL MEMORY WITH ENHANCED ELECTRIC FIELD
    7.
    发明申请
    THREE-DIMENSIONAL OBLIQUE TWO-TERMINAL MEMORY WITH ENHANCED ELECTRIC FIELD 有权
    具有增强电场的三维对象双端存储器

    公开(公告)号：US20140312296A1

    公开(公告)日：2014-10-23

    申请号：US14194499

    申请日：2014-02-28

    申请人： Crossbar, Inc.

    发明人： Sung Hyun JO ,  Joanna BETTINGER ,  Xianliang LIU

    IPC分类号： H01L27/24 ,  H01L45/00

    CPC分类号： H01L27/249 ,  G11C13/0007 ,  G11C13/0011 ,  G11C2213/50 ,  G11C2213/72 ,  G11C2213/77 ,  H01L27/2409 ,  H01L27/2418 ,  H01L45/085 ,  H01L45/122 ,  H01L45/1226 ,  H01L45/145 ,  H01L45/146 ,  H01L45/148

    摘要： Providing for three-dimensional memory cells having enhanced electric field characteristics is described herein. By way of example, a two-terminal memory cell can be constructed from a layered stack of materials, where respective layers are arranged along a direction that forms a non-zero angle to a normal direction of a substrate surface upon which the layered stack of materials is constructed. In some aspects, the direction can be orthogonal to or substantially orthogonal to the normal direction. In other aspects, the direction can be less than orthogonal to the normal direction. Where an internal angle of the memory cell forms a non-orthogonal angle, an enhanced electric field or current density can result, providing improved switching times and memory performance.

    摘要翻译： 本文描述了提供具有增强的电场特性的三维存储单元。 作为示例，可以从层叠的材料堆构成双端存储器单元，其中各层沿着与衬底表面的法线方向形成非零角度的方向布置，在衬底表面上层叠叠层 材料建成。 在一些方面，方向可以与法线方向正交或基本正交。 在其他方面，方向可以小于正交方向。 在存储单元的内部角度形成非正交角度的情况下，可以产生增强的电场或电流密度，从而提供改进的开关时间和存储器性能。

    Electronic device including a semiconductor memory and method for fabricating the same
    9.
    发明授权
    Electronic device including a semiconductor memory and method for fabricating the same 有权
    包括半导体存储器的电子器件及其制造方法

    公开(公告)号：US09588890B2

    公开(公告)日：2017-03-07

    申请号：US14599234

    申请日：2015-01-16

    申请人： SK hynix Inc.

    发明人： In-Hoe Kim

    IPC分类号： H01L45/00 ,  G06F12/08 ,  G11C11/16 ,  H01L43/08

    CPC分类号： G06F12/0802 ,  G11C11/161 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/50 ,  H01L43/08 ,  H01L45/08 ,  H01L45/1226 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/165

    摘要： The disclosed technology provides an electronic device includes a semiconductor memory that includes a first contact plug over a substrate; an interlayer dielectric layer located over the first contact plug and having a hole which exposes at least a portion of the first contact plug; a first electrode layer formed along a sidewall and a bottom surface of the hole to be in contact with the first contact plug; a variable resistance layer over the first electrode layer and structured to include (1) a first portion that extends along the sidewall of the hole in a direction perpendicular to the substrate and exhibits a variable resistance and (2) a second portion that is parallel to the bottom surface of the hole and does not exhibit a variable resistance, and a second electrode layer formed over the variable resistance layer.

    摘要翻译： 所公开的技术提供了一种电子设备，包括半导体存储器，其包括在衬底上的第一接触插塞; 位于所述第一接触插塞上方并且具有露出所述第一接触插塞的至少一部分的孔的层间电介质层; 沿着所述孔的侧壁和所述底表面形成以与所述第一接触插塞接触的第一电极层; 第一电极层上的可变电阻层，并且被构造为包括（1）沿着垂直于衬底的方向沿着孔的侧壁延伸并呈现可变电阻的第一部分，以及（2）平行于 孔的底面并且不具有可变电阻，以及形成在可变电阻层上的第二电极层。