公开(公告)号：US12100449B1

公开(公告)日：2024-09-24

申请号：US17710809

申请日：2022-03-31

申请人： Crossbar, Inc.

发明人： Hagop Nazarian

IPC分类号： G11C16/34 ,  G11C13/00 ,  H04L9/32

CPC分类号： G11C13/0069 ,  G11C13/0059 ,  H04L9/3278 ,  G11C2013/0078

摘要： Embodiments of the present disclosure provide intrinsic program suppression of a non-programmed two-terminal resistive switching memory cell of a plurality of memory cells defining an identifier bit, such as a physical unclonable feature (PUF) bit. Differential programming applies a program signal to a plurality of resistive switching memory cells and derives a value for the identifier bit from which cell(s) becomes programmed. However, where more than an expected number of cells become programmed, an invalid value can occur. Disclosed intrinsic program suppression mitigates or avoids the invalid result by very rapidly reducing the program signal to a non-programmed cell(s) in response to another cell(s) becoming programmed. In an embodiment, intrinsic program suppression can be implemented by programming the plurality of memory cells electrically in parallel and shorting second terminals of the plurality of memory cells at a common node.

公开(公告)号：US12087397B1

公开(公告)日：2024-09-10

申请号：US17708491

申请日：2022-03-30

申请人： Crossbar, Inc.

发明人： Mehdi Asnaashari

IPC分类号： G11C7/00 ,  G06F3/06 ,  G11C7/24 ,  G11C13/00

CPC分类号： G11C7/24 ,  G06F3/0604 ,  G06F3/0655 ,  G06F3/0673 ,  G11C13/0023 ,  G11C13/0069 ,  G11C13/0097

摘要： An integrated circuit device can be configured to characterize portions of a resistive switching device array according to one or more operational characterizations. The memory device can store trim instructions defining signal processes for implementing the operational characterizations. Examples of resistive switching device characterizations can include: a physical unclonable feature (PUF) memory characterization, a one-time programmable (OTP) memory characterization, a many-time programmable (MTP) memory characterization, and a random number generation (RNG) memory characterization, among others. The integrated circuit device can characterize portions of the resistive switching device array in response to an instruction from an external host device, exposing control over the selective characterization of the portions of the resistive switching device array to the external host device.

公开(公告)号：US12020748B2

公开(公告)日：2024-06-25

申请号：US17707444

申请日：2022-03-29

申请人： Crossbar, Inc.

发明人： Zhi Li ,  Derek Lau ,  Sung-Hyun Jo

IPC分类号： G11C13/04 ,  G11C13/00

CPC分类号： G11C13/0069 ,  G11C13/0038 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0097

摘要： Techniques for using native and/or previously programmed resistive switching devices as one time programmable memory are discussed. On example method comprises allocating a set of resistive switching devices to be one time programmable memory; determining data to be stored in the set of resistive switching devices; for each resistive switching device of the set of resistive switching devices, assigning one of a first digital value or a second digital value to that resistive switching device, based on the data; and for each resistive switching device assigned the first digital value, permanently programming that resistive switching device via reverse formation.

公开(公告)号：US11944020B2

公开(公告)日：2024-03-26

申请号：US17127462

申请日：2020-12-18

申请人： Crossbar, Inc.

发明人： Sundar Narayanan ,  Natividad Vasquez ,  Zhen Gu ,  Yunyu Wang

IPC分类号： H10N70/00 ,  H10N70/20

CPC分类号： H10N70/826 ,  H10N70/063 ,  H10N70/20 ,  H10N70/841

摘要： A two-terminal resistive switching device (TTRSD) such as a non-volatile two-terminal memory device or a volatile two-terminal selector device can be formed according to a manufacturing process. The process can include forming an etch stop layer that is made of aluminum and can include forming a buffer layer below the etch stop layer and/or between the etch stop layer and a top electrode of the TTRSD.

公开(公告)号：US11836277B2

公开(公告)日：2023-12-05

申请号：US17354634

申请日：2021-06-22

申请人： CROSSBAR, INC.

发明人： George Minassian

IPC分类号： G06F21/74

CPC分类号： G06F21/74 ,  G06F2221/2123

摘要： A secure integrated circuit comprises a lower logic layer, and one or more memory layers disposed above the lower logic layer. A security key is provided in one or more of the memory layers for unlocking the logic layer. A plurality of connectors are provided between the one or more memory layers and the lower logic layer to electrically couple the memory layer(s) and lower logic layer.

公开(公告)号：US11793093B2

公开(公告)日：2023-10-17

申请号：US16651702

申请日：2018-10-01

申请人： CROSSBAR, INC.

发明人： Sung-Hyun Jo ,  Sundar Narayanan ,  Zhen Gu

IPC分类号： H10N70/00

CPC分类号： H10N70/841 ,  H10N70/021 ,  H10N70/881

摘要： A self-aligned memory device includes a conductive bottom plug disposed within an insulating layer and having a coplanar top surface, a self-aligned planar bottom electrode disposed upon the coplanar top surface and having a thickness within a range of 50 Angstroms to 200 Angstroms, a planar switching material layer disposed upon the self-aligned planar bottom electrode, a planar active metal material layer disposed upon the planar switching material layer and a planar top electrode disposed above the planar active metal material layer, wherein the self-aligned planar bottom electrode, the planar switching material layer, the planar active metal material layer, and the planar top electrode form a pillar-like structure above the insulating layer.

公开(公告)号：US11790999B2

公开(公告)日：2023-10-17

申请号：US17242015

申请日：2021-04-27

申请人： CROSSBAR, INC.

发明人： Jeremy Guy ,  Sung Hyun Jo ,  Hagop Nazarian ,  Ruchirkumar Shah ,  Liang Zhao

IPC分类号： G11C16/34 ,  G11C16/16 ,  G11C16/26 ,  G11C11/56 ,  G11C13/00

CPC分类号： G11C16/3445 ,  G11C11/5678 ,  G11C13/004 ,  G11C13/0069 ,  G11C16/16 ,  G11C16/26

摘要： A method for erasing a memory cell includes applying a first erase to memory cells to erase the memory cells, wherein first memory cells are in a weakly erased state in response to the first erase, and wherein second memory cells are in a normally erased state in response to the first erase, thereafter applying a first weak program to the memory cells, wherein the second memory cells enter a programmed state and the third memory cells remain in the erased state in response to the first weak program, and thereafter applying a read to the memory cells to identify the second memory cells, and applying a second erase to the second memory cells to thereby erase the second memory cells.

公开(公告)号：US20230317157A1

公开(公告)日：2023-10-05

申请号：US17707444

申请日：2022-03-29

申请人： Crossbar, Inc.

发明人： Zhi Li ,  Derek Lau ,  Sung-Hyun Jo

IPC分类号： G11C13/00

CPC分类号： G11C13/0069 ,  G11C13/0097 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0038

摘要： Techniques for using native and/or previously programmed resistive switching devices as one time programmable memory are discussed. On example method comprises allocating a set of resistive switching devices to be one time programmable memory; determining data to be stored in the set of resistive switching devices; for each resistive switching device of the set of resistive switching devices, assigning one of a first digital value or a second digital value to that resistive switching device, based on the data; and for each resistive switching device assigned the first digital value, permanently programming that resistive switching device via reverse formation.

公开(公告)号：US20230005538A1

公开(公告)日：2023-01-05

申请号：US17899356

申请日：2022-08-30

申请人： CROSSBAR, INC.

发明人： Sung Hyun Jo ,  Hagop Nazarian ,  Sang Nguyen ,  Jeremy Guy ,  Zhi Li

IPC分类号： G11C13/00 ,  H01L27/24 ,  H01L45/00 ,  H04L9/32

摘要： Stochastic or near-stochastic physical characteristics of resistive switching devices are utilized for generating data distinct to those resistive switching devices. The distinct data can be utilized for applications related to electronic identification. As one example, data generated from physical characteristics of resistive switching devices on a semiconductor chip can be utilized to form a distinct identifier sequence for that semiconductor chip, utilized for verification applications for communications with the semiconductor chip or utilized for generating cryptographic keys or the like for cryptographic applications.

公开(公告)号：US20220320432A1

公开(公告)日：2022-10-06

申请号：US17218608

申请日：2021-03-31

申请人： CROSSBAR, INC.

发明人： Sundar Narayanan ,  Wee Chen Gan ,  Natividad Vasquez, JR. ,  Wei Ti Lee

IPC分类号： H01L45/00 ,  H01L27/24

摘要： Resistive switching memory cells having filament-based switching mechanisms are provided. By way of example, resistive switching memory cells having resistive filaments constrained to a core of the cell are disclosed. In other examples, methods for fabricating resistive switching memory cells to constrain a conductive filament formed in the resistive switching memory cell to a central portion of core of the cell are disclosed.