Secure circuit integrated with memory layer

    公开(公告)号:US11836277B2

    公开(公告)日:2023-12-05

    申请号:US17354634

    申请日:2021-06-22

    申请人: CROSSBAR, INC.

    发明人: George Minassian

    IPC分类号: G06F21/74

    CPC分类号: G06F21/74 G06F2221/2123

    摘要: A secure integrated circuit comprises a lower logic layer, and one or more memory layers disposed above the lower logic layer. A security key is provided in one or more of the memory layers for unlocking the logic layer. A plurality of connectors are provided between the one or more memory layers and the lower logic layer to electrically couple the memory layer(s) and lower logic layer.

    Secure circuit integrated with memory layer

    公开(公告)号:US11068620B2

    公开(公告)日:2021-07-20

    申请号:US13673951

    申请日:2012-11-09

    申请人: Crossbar, Inc.

    发明人: George Minassian

    IPC分类号: G06F21/74

    摘要: An example secure circuit device includes a logic layer with a logic circuit, first and second memory layers, and connectors between the logic layer and the memory layers. The logic circuit executes logic operations in response to being in an unlocked state and does not execute logic operations in response to being in a locked state. The logic circuit is in the unlocked state in response to a security key being accessible and in the locked state when the security key is inaccessible. The first memory layer is disposed over a second memory layer with the first and second memory layers being disposed over the logic layer in a monolithic structure. The security key includes a first security key portion disposed in the first memory layer and a second security key portion disposed in the second memory layer.