公开(公告)号：US20230197671A1

公开(公告)日：2023-06-22

申请号：US18172988

申请日：2023-02-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Shiuan Wong ,  Ching-Hua Hsieh ,  Hsiu-Jen Lin ,  Hao-Jan Pei ,  Hsuan-Ting Kuo ,  Wei-Yu Chen ,  Chia-Shen Cheng ,  Philip Yu-Shuan Chung

IPC分类号： H01L23/00 ,  B23K1/008

CPC分类号： H01L24/75 ,  B23K1/008 ,  H01L24/81 ,  B23K2101/40

摘要： A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.

公开(公告)号：US11585992B2

公开(公告)日：2023-02-21

申请号：US17315376

申请日：2021-05-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Lun Chang ,  Ching-Hua Hsieh ,  Cheng-Ting Chen ,  Hsiu-Jen Lin ,  Hsuan-Ting Kuo ,  Chia-Shen Cheng ,  Chih-Chiang Tsao

IPC分类号： G02B6/42 ,  H01L23/538 ,  H01L25/18 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/683 ,  H01L21/56 ,  G02B6/43 ,  H05K1/18 ,  H05K1/02

摘要： In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.

公开(公告)号：US20210263243A1

公开(公告)日：2021-08-26

申请号：US17315376

申请日：2021-05-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Lun Chang ,  Ching-Hua Hsieh ,  Cheng-Ting Chen ,  Hsiu-Jen Lin ,  Hsuan-Ting Kuo ,  Chia-Shen Cheng ,  Chih-Chiang Tsao

IPC分类号： G02B6/42 ,  H01L23/538 ,  H01L25/18 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/683 ,  H01L21/56 ,  G02B6/43 ,  H05K1/18 ,  H05K1/02

摘要： In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.

公开(公告)号：US10861827B2

公开(公告)日：2020-12-08

申请号：US16397479

申请日：2019-04-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Tse Chen ,  Chung-Shi Liu ,  Chih-Wei Lin ,  Hui-Min Huang ,  Hsuan-Ting Kuo ,  Ming-Da Cheng

IPC分类号： H01L23/02 ,  H01L25/065 ,  H01L21/56 ,  H01L25/00 ,  H01L21/768 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00

摘要： An embodiment is method including forming a first die package over a carrier substrate, the first die package comprising a first die, forming a first redistribution layer over and coupled to the first die, the first redistribution layer including one or more metal layers disposed in one or more dielectric layers, adhering a second die over the redistribution layer, laminating a first dielectric material over the second die and the first redistribution layer, forming first vias through the first dielectric material to the second die and forming second vias through the first dielectric material to the first redistribution layer, and forming a second redistribution layer over the first dielectric material and over and coupled to the first vias and the second vias.

公开(公告)号：US09881903B2

公开(公告)日：2018-01-30

申请号：US15228922

申请日：2016-08-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Wei-Yu Chen ,  Kuei-Wei Huang ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Ching-Hua Hsieh ,  Chung-Shi Liu ,  Hsuan-Ting Kuo

IPC分类号： H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/12105 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15313 ,  H01L2924/3511

摘要： A structure includes a first package and a second package. The second package is coupled to the first package by one or more connectors. Epoxy flux residue is disposed around the connectors and in contact with the connectors. A method includes providing a first package having first connector pads and providing a second package having corresponding second connector pads. Solder paste is printed on each of the first connector pads. Epoxy flux is printed on each of the solder paste. The first and second connector pads are aligned and the packages are pressed together. The solder paste is reflowed to connect the first connector pads to the second connector pads while leaving an epoxy flux residue around each of the connections.

公开(公告)号：US09368398B2

公开(公告)日：2016-06-14

申请号：US14198262

申请日：2014-03-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wen-Hsiung Lu ,  Wei-Yu Chen ,  Hsuan-Ting Kuo ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L21/44 ,  H01L21/768 ,  H01L23/532 ,  H01L23/525 ,  H01L23/31

CPC分类号： H01L24/13 ,  H01L21/568 ,  H01L21/768 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76832 ,  H01L23/293 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/315 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/53295 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/10126 ,  H01L2224/11 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01029

摘要： An interconnect structure and a method of fabrication of the same are introduced. In an embodiment, a post passivation interconnect (PPI) structure is formed over a passivation layer of a substrate. A bump is formed over the PPI structure. A molding layer is formed over the PPI structure. A film is applied over the molding layer and the bump using a roller. The film is removed from over the molding layer and the bump, and the remaining material of the film on the molding layer forms the protective layer. A plasma cleaning is preformed to remove the remaining material of the film on the bump.

摘要翻译： 引入互连结构及其制造方法。 在一个实施例中，在衬底的钝化层上形成后钝化互连（PPI）结构。 在PPI结构上形成凸块。 在PPI结构上形成成型层。 使用辊将膜涂覆在成型层和凸块上。 从模制层和凸起上方去除膜，并且在模制层上的膜的剩余材料形成保护层。 进行等离子体清洗以去除凸起上的膜的剩余材料。

公开(公告)号：US20140252601A1

公开(公告)日：2014-09-11

申请号：US13838748

申请日：2013-03-15

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Wen-Hsiung Lu ,  Hsuan-Ting Kuo ,  Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L24/11 ,  H01L21/566 ,  H01L21/76885 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02331 ,  H01L2224/0345 ,  H01L2224/0347 ,  H01L2224/036 ,  H01L2224/0362 ,  H01L2224/03828 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05582 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/10126 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/1148 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81815 ,  H01L2924/04953 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

摘要： Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is an interconnect structure including a post-passivation interconnect (PPI) over a first substrate and a conductive connector on the PPI. The interconnect structure further includes a molding compound on a top surface of the PPI and surrounding a portion of the conductive connector, a top surface of the molding compound adjoining the conductive connector at an angle from about 10 degrees to about 60 degrees relative to a plane parallel with a major surface of the first substrate, the conductive connector having a first width at the adjoining top surface of the molding compound, and a second substrate over the conductive connector, the second substrate being mounted to the conductive connector.

摘要翻译： 本公开的实施例包括互连结构和形成互连结构的方法。 一个实施例是一种互连结构，其包括在第一衬底上的后钝化互连（PPI）和PPI上的导电连接器。 所述互连结构还包括在所述PPI的顶表面上并围绕所述导电连接器的一部分的模制化合物，所述模制化合物的与所述导电连接器相邻的顶表面相对于平面成约10度至约60度的角度 平行于第一基板的主表面，导电连接器在模制化合物的相邻顶表面处具有第一宽度，并且在导电连接器上方具有第二基板，第二基板安装到导电连接器。

公开(公告)号：US11874513B2

公开(公告)日：2024-01-16

申请号：US18162712

申请日：2023-02-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Lun Chang ,  Ching-Hua Hsieh ,  Cheng-Ting Chen ,  Hsiu-Jen Lin ,  Hsuan-Ting Kuo ,  Chia-Shen Cheng ,  Chih-Chiang Tsao

IPC分类号： G02B6/42 ,  H01L23/538 ,  H01L25/18 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/683 ,  H01L21/56 ,  G02B6/43 ,  H05K1/18 ,  H05K1/02

CPC分类号： G02B6/428 ,  G02B6/4214 ,  G02B6/4253 ,  G02B6/43 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5386 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L25/18 ,  H01L25/50 ,  H05K1/0274 ,  H05K1/181 ,  H01L21/568 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/215 ,  H01L2224/24225 ,  H01L2224/821 ,  H01L2224/82005 ,  H01L2224/95001 ,  H01L2924/12042 ,  H01L2924/12043 ,  H05K2201/10121 ,  H05K2201/10151 ,  H05K2201/2054

摘要： In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.

公开(公告)号：US20230168451A1

公开(公告)日：2023-06-01

申请号：US18162712

申请日：2023-02-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Lun Chang ,  Ching-Hua Hsieh ,  Cheng-Ting Chen ,  Hsiu-Jen Lin ,  Hsuan-Ting Kuo ,  Chia-Shen Cheng ,  Chih-Chiang Tsao

IPC分类号： G02B6/42 ,  H01L23/538 ,  H01L25/18 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/683 ,  H01L21/56 ,  G02B6/43 ,  H05K1/18 ,  H05K1/02

CPC分类号： G02B6/428 ,  H01L23/5386 ,  G02B6/4214 ,  H01L25/18 ,  H01L23/3128 ,  H01L24/24 ,  H01L25/50 ,  H01L24/82 ,  H01L21/6835 ,  H01L21/561 ,  H01L24/96 ,  G02B6/4253 ,  H01L21/565 ,  G02B6/43 ,  H05K1/181 ,  H05K1/0274 ,  H05K2201/2054 ,  H05K2201/10121 ,  H01L2224/95001 ,  H01L21/568 ,  H01L2224/821 ,  H05K2201/10151 ,  H01L2224/82005 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/215 ,  H01L2224/24225 ,  H01L2924/12042 ,  H01L2924/12043

摘要： In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.

公开(公告)号：US11043463B2

公开(公告)日：2021-06-22

申请号：US16923739

申请日：2020-07-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wen-Hsiung Lu ,  Hsuan-Ting Kuo ,  Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/00 ,  H01L21/768 ,  H01L23/525 ,  H01L23/532 ,  H01L23/29 ,  H01L23/31 ,  H01L21/56

摘要： Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is an interconnect structure including a post-passivation interconnect (PPI) over a first substrate and a conductive connector on the PPI. The interconnect structure further includes a molding compound on a top surface of the PPI and surrounding a portion of the conductive connector, a top surface of the molding compound adjoining the conductive connector at an angle from about 10 degrees to about 60 degrees relative to a plane parallel with a major surface of the first substrate, the conductive connector having a first width at the adjoining top surface of the molding compound, and a second substrate over the conductive connector, the second substrate being mounted to the conductive connector.