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公开(公告)号：US09627086B2
公开(公告)日：2017-04-18
申请号：US14811380
申请日：2015-07-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Chi Weon Yoon , Donghyuk Chae , Jae-Woo Park , Sang-Wan Nam
Abstract: A method of operating a non-volatile memory device includes performing an erasing operation to memory cells associated with a plurality of string selection lines (SSLs), the memory cells associated with the plurality of SSLs constituting a memory block, and verifying the erasing operation to second memory cells associated with a second SSL after verifying the erasing operation to first memory cells associated with a first SSL.
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2.发明申请FLASH MEMORY DEVICES HAVING MULTI-BIT MEMORY CELLS THEREIN WITH IMPROVED READ RELIABILITY 审中-公开具有改善读取可靠性的多位存储器单元的闪存存储器件公开(公告)号：US20130286732A1
公开(公告)日：2013-10-31
申请号：US13920630
申请日：2013-06-18
Applicant: Samsung Electronics Co., Ltd.
Inventor： Donghyuk Chae , Jinman Han
IPC: G11C16/26
CPC classification number: G11C16/26 , G11C11/5642 , G11C16/0483 , G11C16/3418
Abstract: Integrated circuit memory devices include an array of nonvolatile N-bit memory cells, where N is an integer greater than one. Control circuitry is also provided to reliably read data from the N-bit memory cells. This control circuitry, which is electrically coupled to the array, is configured to determine, among other things, a value of at least one bit of data stored in a selected N-bit memory cell in the array. This is done by decoding at least one hard data value and a plurality of soft data values (e.g., 6 data values) read from the selected N-bit memory cell using a corresponding plurality of unequal read voltages applied to the selected N-bit memory cell during a read operation.
Abstract translation: 集成电路存储器件包括非易失性N位存储器单元的阵列，其中N是大于1的整数。 还提供控制电路以可靠地从N位存储器单元读取数据。 电耦合到阵列的该控制电路被配置为确定存储在阵列中的所选N位存储器单元中的至少一位数据的值。 这是通过使用施加到所选择的N位存储器的对应的多个不等的读取电压来解码从所选择的N位存储器单元读取的至少一个硬数据值和多个软数据值（例如，6个数据值）来完成的 在读操作期间。
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3.发明授权公开(公告)号：US11715537B2
公开(公告)日：2023-08-01
申请号：US17542183
申请日：2021-12-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun-Il Shim , Jae-Hoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
IPC: G11C16/34 , G11C16/04 , H10B43/27 , G11C16/08 , G11C16/12 , G11C5/06 , G11C11/4074 , G11C11/408 , G11C11/4096 , G11C16/14 , G11C16/26 , G11C16/10 , H10B43/35
CPC classification number: G11C16/3459 , G11C5/06 , G11C11/4074 , G11C11/4085 , G11C11/4096 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , G11C16/3418 , H10B43/27 , H10B43/35
Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
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4.发明授权公开(公告)号：US10650903B2
公开(公告)日：2020-05-12
申请号：US16206383
申请日：2018-11-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun-Il Shim , Jae-Hoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
IPC: G11C16/04 , G11C16/10 , G11C16/34 , H01L27/11582 , G11C16/08 , G11C16/12 , G11C16/14 , G11C16/26 , H01L27/1157
Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
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公开(公告)号：USRE46887E1
公开(公告)日：2018-06-05
申请号：US14805938
申请日：2015-07-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： ChiWeon Yoon , Donghyuk Chae , Sang-Wan Nam , Sung-Won Yun
IPC: G11C11/34 , G11C16/04 , G11C16/10 , G11C16/34 , H01L29/792 , H01L27/11582 , H01L29/788 , H01L27/11556
CPC classification number: G11C16/10 , G11C16/0483 , G11C16/3418 , H01L27/11556 , H01L27/11582 , H01L29/7889 , H01L29/7926
Abstract: Non-volatile memory device channel boosting methods in which at least two strings are connected to one bit line, the channel boosting methods including applying an initial channel voltage to channels of strings in a selected memory block, floating inhibit strings each having an un-programmed cell among the strings, and boosting channels of the floated inhibit strings.
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Patent Agency Ranking
6.发明授权Nonvolatile memory device, operating method thereof and memory system including the same 有权非易失性存储器件，其操作方法和包括该非易失性存储器件的存储器系统公开(公告)号：US09159443B2
公开(公告)日：2015-10-13
申请号：US14052227
申请日：2013-10-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Chi Weon Yoon , Donghyuk Chae , Jae-Woo Park , Sang-Wan Nam
CPC classification number: G11C16/3445 , G11C16/0483 , G11C16/06 , G11C16/16 , H01L29/792
Abstract: A method of operating a non-volatile memory device includes performing an erasing operation to memory cells associated with a plurality of string selection lines (SSLs), the memory cells associated with the plurality of SSLs constituting a memory block, and verifying the erasing operation to second memory cells associated with a second SSL after verifying the erasing operation to first memory cells associated with a first SSL.
Abstract translation: 操作非易失性存储器件的方法包括对与多个串选择线（SSL）相关联的存储器单元执行擦除操作，与构成存储块的多个SSL相关联的存储器单元，以及将擦除操作 在对与第一SSL相关联的第一存储器单元进行擦除操作之后，与第二SSL相关联的第二存储器单元。
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公开(公告)号：US08923060B2
公开(公告)日：2014-12-30
申请号：US13721963
申请日：2012-12-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Jaehoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
CPC classification number: G11C16/30 , G11C16/0483 , G11C16/10 , G11C16/3418 , G11C16/3459 , H01L27/1157 , H01L27/11582
Abstract: According to example embodiments of inventive concepts, a nonvolatile memory device includes a memory cell array including a plurality of memory cells; a word line driver configured to at least one of select and unselect a plurality of word lines connected with the plurality of memory cells, respectively, and to supply voltages to the plurality of word lines; and a read/write circuit configured to apply bias voltages to a plurality of bit lines connected with the plurality of memory cells. The read/write circuit may be configured to adjust levels of the bias voltages applied to the plurality of bit lines according to location of a selected word line among the plurality of word lines.
Abstract translation: 根据发明构思的示例实施例，非易失性存储器件包括包括多个存储器单元的存储单元阵列; 字线驱动器，被配置为分别选择和取消选择与所述多个存储器单元连接的多个字线中的至少一个，并向所述多个字线提供电压; 以及读/写电路，被配置为向与多个存储单元连接的多个位线施加偏置电压。 读/写电路可以被配置为根据多个字线中所选择的字线的位置来调整施加到多个位线的偏置电压的电平。
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8.发明申请公开(公告)号：US20210295895A1
公开(公告)日：2021-09-23
申请号：US17342048
申请日：2021-06-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun-Il Shim , Jae-Hoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
IPC: G11C11/408 , G11C11/4096 , G11C11/4074 , G11C5/06
Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
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9.发明授权公开(公告)号：US09330770B2
公开(公告)日：2016-05-03
申请号：US14590665
申请日：2015-01-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Jaehoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
CPC classification number: G11C16/3459 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , G11C16/3418 , H01L27/1157 , H01L27/11582
Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
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公开(公告)号：US09240239B2
公开(公告)日：2016-01-19
申请号：US14610584
申请日：2015-01-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung-Hwa Kang , Sang-Wan Nam , Donghyuk Chae , ChiWeon Yoon
IPC: G11C11/34 , G11C16/04 , G11C16/08 , H01L27/115
CPC classification number: G11C16/0483 , G11C16/0466 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/11565 , H01L27/1157 , H01L27/11582
Abstract: Nonvolatile memory devices including memory cell arrays with a plurality of cell strings connected between a substrate and a plurality of bit lines and selected by selection lines, and a gating circuit configured to drive the selection lines in at least two directions.
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