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    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190318990A1

    公开(公告)日：2019-10-17

    申请号：US16370370

    申请日：2019-03-29

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Kazuyuki NAKAGAWA ,  Shinji BABA ,  Hiroshi KOIZUMI

    IPC: H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L23/34 ,  H01L23/00

    Abstract: A semiconductor device includes a wiring substrate provided with a plurality of pads electrically connected to a semiconductor chip in a flip-chip interconnection. The wiring substrate includes a pad forming layer in which a signal pad configured to receive transmission of a first signal and a second pad configured to receive transmission of a second signal different from the first signal are formed and a first wiring layer located at a position closest to the pad forming layer. In the wiring layer, a via land overlapping with the signal pad, a wiring connected to the via land, and a wiring connected to the second pad and extending in an X direction are formed. In a Y direction intersecting the X direction, a width of the via land is larger than a width of the wiring. A wiring is adjacent to the via land and overlaps with the signal pad.

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    7.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号：US20150079762A1

    公开(公告)日：2015-03-19

    申请号：US14485649

    申请日：2014-09-12

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Kazuyuki NAKAGAWA ,  Shunichi ABE

    IPC: H01L21/78

    CPC classification number: H01L21/78 ,  H01L22/32 ,  H01L22/34 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2224/02166 ,  H01L2224/05554

    Abstract: To provide a semiconductor device having improved reliability. A method of manufacturing a semiconductor device according to one embodiment includes a step of cutting, in a dicing region arranged between two chip regions adjacent to each other, a wafer along an extending direction of the dicing region. The dicing region has therein a plurality of metal patterns in a plurality of columns. In the step of cutting the wafer, one or more of the columns of metal patterns formed in a plurality of columns are removed, and the metal patterns of the column(s) different from the above-mentioned one or more of the columns are not removed.

    Abstract translation: 提供具有提高的可靠性的半导体器件。 根据一个实施例的制造半导体器件的方法包括在切割区域的延伸方向上切割在彼此相邻的两个芯片区域之间的切割区域中的晶片的步骤。 切割区域中具有多个列中的多个金属图案。 在切割晶片的步骤中，去除在多个列中形成的一列或多列金属图案，并且与上述一个或多个列不同的列的金属图案不是 删除。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190198462A1

    公开(公告)日：2019-06-27

    申请号：US16175522

    申请日：2018-10-30

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Kazuyuki NAKAGAWA ,  Keita TSUCHIYA ,  Yoshiaki SATO ,  Shuuichi KARIYAZAKI ,  Norio CHUJO ,  Masayoshi YAGYU ,  Yutaka UEMATSU

    IPC: H01L23/66 ,  H01L23/538 ,  H01L23/367 ,  H01L23/00

    Abstract: A semiconductor device includes a semiconductor chip mounted over a wiring substrate. A signal wiring for input for transmitting input signals to the semiconductor chip and a signal wiring for output for transmitting output signals from the semiconductor chip are placed in different wiring layers in the wiring substrate and overlap with each other. In the direction of thickness of the wiring substrate, each of the signal wirings is sandwiched between conductor planes supplied with reference potential. In the front surface of the semiconductor chip, a signal electrode for input and a signal electrode for output are disposed in different rows. In cases where the signal wiring for output is located in a layer higher than the signal wiring for input in the wiring substrate, the signal electrode for output is placed in a row closer to the outer edge of the front surface than the signal electrode for input.

    SEMICONDUCTOR DEVICE
    10.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20180374788A1

    公开(公告)日：2018-12-27

    申请号：US16063280

    申请日：2016-02-10

    Applicant: Renesas Electronics Corporation

    Inventor： Kazuyuki NAKAGAWA ,  Katsushi TERAJIMA ,  Keita TSUCHIYA ,  Yoshiaki SATO ,  Hiroyuki UCHIDA ,  Yuji KAYASHIMA ,  Shuuichi KARIYAZAKI ,  Shinji BABA

    IPC: H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

    Abstract: According to an embodiment of the present invention, there is provided a semiconductor device having a first semiconductor component and a second semiconductor component which are mounted on a wiring substrate. The first semiconductor component has a first terminal for transmitting a first signal between the first semiconductor component and the outside and a second terminal for transmitting a second signal between the first semiconductor component and the second semiconductor component. In addition, the second semiconductor component has a third terminal for transmitting the second signal between the second semiconductor component and the first semiconductor component. Further, the first signal is transmitted at a higher frequency than the second signal. Furthermore, the second terminal of the first semiconductor component and the third terminal of the second semiconductor component are electrically connected to each other via the first wiring member. In addition, the first terminal of the first semiconductor component is electrically connected to the wiring substrate via a first bump electrode without the first wiring member interposed therebetween.

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