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    Level shifters, memory systems, and level shifting methods
    3.
    发明授权
    Level shifters, memory systems, and level shifting methods 有权
    电平移位器，存储器系统和电平转换方法

    公开(公告)号：US09331699B2

    公开(公告)日：2016-05-03

    申请号：US14150228

    申请日：2014-01-08

    申请人： Micron Technology, Inc.

    发明人： Yogesh Luthra

    IPC分类号： G11C7/00 ,  H03K19/0185 ,  H03K19/00 ,  G11C5/14 ,  G11C11/4074 ,  G11C13/00 ,  G11C7/10 ,  G11C11/4093

    CPC分类号： H03K19/0013 ,  G11C5/145 ,  G11C5/147 ,  G11C7/1084 ,  G11C7/12 ,  G11C11/4074 ,  G11C11/4093 ,  G11C13/0011 ,  G11C13/0023 ,  G11C13/0038 ,  G11C13/0069 ,  H03K19/018571

    摘要： Level shifters, memory systems, and level shifting methods are described. According to one arrangement, a level shifter includes an input configured to receive an input signal in a first voltage domain, an output configured to output an output signal from the level shifter in a second voltage domain different than the first voltage domain, a plurality of pull-down devices, and wherein one of the pull-down devices is coupled with the input and the output, a plurality of cross-coupled devices coupled with the pull-down devices and configured to provide transitions in the output signal as a result of transitions in the input signal, a plurality of current limiting devices coupled with the cross-coupled devices and configured to limit a flow of current from a source to the cross-coupled devices, and a plurality of dynamic devices configured to selectively provide charging current from the source to the cross-coupled devices.

    摘要翻译： 描述了电平移位器，存储器系统和电平转换方法。 根据一种布置，电平移位器包括被配置为在第一电压域中接收输入信号的输入，被配置为在不同于第一电压域的第二电压域中输出来自电平移位器的输出信号的输出，多个 下拉装置，并且其中下拉装置中的一个与输入和输出端耦合;多个交叉耦合装置，与下拉装置耦合，并且被配置为提供输出信号中的转换，作为 输入信号中的转换，与交叉耦合器件耦合并被配置为限制电流从源极耦合到交叉耦合器件的多个限流器件，以及多个动态器件，被配置为选择性地提供从 源到交叉耦合器件。

    Memory devices, memory device operational methods, and memory device implementation methods
    5.
    发明授权
    Memory devices, memory device operational methods, and memory device implementation methods 有权
    存储器件，存储器件操作方法和存储器件实现方法

    公开(公告)号：US09230616B2

    公开(公告)日：2016-01-05

    申请号：US14151704

    申请日：2014-01-09

    申请人： Micron Technology, Inc.

    发明人： Yogesh Luthra ,  Makoto Kitagawa

    IPC分类号： G11C7/04 ,  G01K13/00 ,  G11C11/406

    CPC分类号： G11C7/04 ,  G01K1/02 ,  G01K13/00 ,  G01K2219/00 ,  G11C11/40626 ,  G11C13/0002 ,  G11C13/0011 ,  G11C13/0033 ,  G11C13/0069 ,  G11C16/10 ,  G11C16/3418

    摘要： Memory devices, memory device operational methods, and memory device implementation methods are described. According to one arrangement, a memory device includes memory circuitry configured to store data in a plurality of different data states, temperature sensor circuitry configured to sense a temperature of the memory device and to generate an initial temperature output which is indicative of the temperature of the memory device, and conversion circuitry coupled with the temperature sensor circuitry and configured to convert the initial temperature output into a converted temperature output which is indicative of the temperature of the memory device at a selected one of a plurality of possible different temperature resolutions, and wherein the converted temperature output is utilized by the memory circuitry to implement at least one operation with respect to storage of the data.

    摘要翻译： 描述了存储器件，存储器件操作方法和存储器件实现方法。 根据一种布置，存储器件包括被配置为存储多个不同数据状态的数据的存储器电路，温度传感器电路被配置为感测存储器件的温度并产生初始温度输出，其表示温度 存储器件和转换电路，其与温度传感器电路耦合并且被配置为将初始温度输出转换成转换后的温度输出，该转换温度输出指示存储器件在多个可能的不同温度分辨率中选定的一个温度， 转换的温度输出由存储器电路用于实现关于数据存储的至少一个操作。

    Memory devices and methods of their operation during a programming operation
    7.
    发明授权
    Memory devices and methods of their operation during a programming operation 有权

    公开(公告)号：US09779822B1

    公开(公告)日：2017-10-03

    申请号：US15499119

    申请日：2017-04-27

    申请人： MICRON TECHNOLOGY, INC.

    发明人： Yogesh Luthra ,  Kim-Fung Chan ,  Xiaojiang Guo

    IPC分类号： G11C16/10 ,  G11C16/04

    摘要： Methods of operating a memory device during a programming operation, and memory devices so configured, including increasing a voltage applied to a selected access line from a first voltage while maintaining a voltage applied to an unselected access line at the first voltage. The selected access line is connected to a control gate of a target memory cell of a string of series-connected memory cells that is targeted for programming during the programming operation and the unselected access line is connected to a control gate of a second memory cell of the string of series-connected memory cells that is untargeted for programming during the programming operation. After the voltage applied to the selected access line reaches a second voltage, the methods further include increasing the voltage applied to the unselected access line from the first voltage while increasing the voltage applied to the selected access line from the second voltage.

    Memory systems and memory programming methods
    8.
    发明授权
    Memory systems and memory programming methods 有权
    内存系统和内存编程方法

    公开(公告)号：US09123414B2

    公开(公告)日：2015-09-01

    申请号：US14088046

    申请日：2013-11-22

    申请人： Micron Technology, Inc.

    发明人： Makoto Kitagawa ,  Yogesh Luthra

    IPC分类号： G11C11/16 ,  G11C13/00

    CPC分类号： G11C13/0069 ,  G11C11/16 ,  G11C13/0011 ,  G11C13/004 ,  G11C13/0064 ,  G11C2013/0054 ,  G11C2013/0066 ,  G11C2013/0071 ,  G11C2013/0076 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/34 ,  G11C2213/55 ,  G11C2213/79

    摘要： Memory systems and memory programming methods are described. According to one aspect, a memory system includes program circuitry configured to provide a program signal to a memory cell to program the memory cell from a first memory state to a second memory state, detection circuitry configured to detect the memory cell changing from the first memory state to the second memory state during the provision of the program signal to the memory cell to program the memory cell, and wherein the program circuitry is configured to alter the program signal as a result of the detection and to provide the altered program signal to the memory cell to continue to program the memory cell from the first memory state to the second memory state.

    摘要翻译： 描述了存储器系统和存储器编程方法。 根据一个方面，一种存储器系统包括被配置为向存储器单元提供程序信号以将存储单元从第一存储器状态编程到第二存储器状态的程序电路，检测电路被配置为检测从第一存储器 在将程序信号提供给存储器单元以对存储器单元进行编程期间状态为第二存储器状态，并且其中，程序电路被配置为作为检测的结果改变程序信号，并且将改变的程序信号提供给 存储单元继续将存储单元从第一存储器状态编程到第二存储器状态。

    Level shifters, memory systems, and level shifting methods
    10.
    发明授权
    Level shifters, memory systems, and level shifting methods 有权

    公开(公告)号：US10972101B2

    公开(公告)日：2021-04-06

    申请号：US16023540

    申请日：2018-06-29

    申请人： Micron Technology, Inc.

    发明人： Yogesh Luthra

    IPC分类号： G11C7/00 ,  H03K19/00 ,  H03K19/0185 ,  G11C13/00 ,  G11C5/14 ,  G11C11/4074 ,  G11C7/12 ,  G11C7/10 ,  G11C11/4093

    摘要： Level shifters, memory systems, and level shifting methods are described. According to one arrangement, a level shifter includes an input configured to receive an input signal in a first voltage domain, an output configured to output an output signal from the level shifter in a second voltage domain different than the first voltage domain, a plurality of pull-down devices, and wherein one of the pull-down devices is coupled with the input and the output, a plurality of cross-coupled devices coupled with the pull-down devices and configured to provide transitions in the output signal as a result of transitions in the input signal, a plurality of current limiting devices coupled with the cross-coupled devices and configured to limit a flow of current from a source to the cross-coupled devices, and a plurality of dynamic devices configured to selectively provide charging current from the source to the cross-coupled devices.