-
公开(公告)号:US20170047515A1
公开(公告)日:2017-02-16
申请号:US15343602
申请日:2016-11-04
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mohit Bajaj , Arpan K. Deb , Aniruddha Konar , Kota V. R. M. Murali , Rajan K. Pandey , Kumar R. Virwani
CPC classification number: H01L45/1666 , B82Y10/00 , H01L21/02568 , H01L21/0262 , H01L27/224 , H01L27/2409 , H01L29/157 , H01L29/24 , H01L29/66121 , H01L29/8618 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/16 , H01L45/1608 , H01L45/165 , Y10S977/76 , Y10S977/943
Abstract: The present invention relates generally to high current density access devices (ADs), and more particularly, to a structure and method of forming tunable voltage margin access diodes in phase change memory (PCM) blocks using layers of copper-containing mixed ionic-electronic conduction (MIEC) materials. Embodiments of the present invention may use layers MIEC material to form an access device that can supply high current-densities and operate reliably while being fabricated at temperatures that are compatible with standard BEOL processing. By varying the deposition technique and amount of MIEC material used, the voltage margin (i.e. the voltage at which the device turns on and the current is above the noise floor) of the access device may be tuned to specific operating conditions of different memory devices.
Abstract translation: 本发明一般涉及高电流密度访问装置(AD),更具体地说,涉及使用含铜混合离子电子传导层的相变存储器(PCM)块中形成可调电压余量存取二极管的结构和方法 (MIEC)材料。 本发明的实施例可以使用层MIEC材料来形成可以提供高电流密度并且在与标准BEOL处理兼容的温度下制造时可靠地操作的接入装置。 通过改变沉积技术和使用的MIEC材料的量,可将接入设备的电压余量(即,器件导通的电压和电流高于本底噪声)调谐到不同存储器件的特定操作条件。
-
公开(公告)号:US20160315254A1
公开(公告)日:2016-10-27
申请号:US15211013
申请日:2016-07-15
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mohit Bajaj , Arpan K. Deb , Aniruddha Konar , Kota V. R. M. Murali , Rajan K. Pandey , Kumar R. Virwani
IPC: H01L45/00
CPC classification number: H01L45/1666 , B82Y10/00 , H01L21/02568 , H01L21/0262 , H01L27/224 , H01L27/2409 , H01L29/157 , H01L29/24 , H01L29/66121 , H01L29/8618 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/16 , H01L45/1608 , H01L45/165 , Y10S977/76 , Y10S977/943
Abstract: The present invention relates generally to high current density access devices (ADs), and more particularly, to a structure and method of forming tunable voltage margin access diodes in phase change memory (PCM) blocks using layers of copper-containing mixed ionic-electronic conduction (MIEC) materials. Embodiments of the present invention may use layers MIEC material to form an access device that can supply high current-densities and operate reliably while being fabricated at temperatures that are compatible with standard BEOL processing. By varying the deposition technique and amount of MIEC material used, the voltage margin (i.e. the voltage at which the device turns on and the current is above the noise floor) of the access device may be tuned to specific operating conditions of different memory devices.
-
公开(公告)号:US09379253B1
公开(公告)日:2016-06-28
申请号:US14837785
申请日:2015-08-27
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mohit Bajaj , Suresh Gundapaneni , Aniruddha Konar , Narasimha R. Mavilla , Kota V. R. M. Murali , Edward J. Nowak
IPC: H01L29/786 , H01L29/66 , H01L29/267 , H01L29/08 , H01L29/78 , H01L21/02
CPC classification number: H01L29/41725 , H01L21/02414 , H01L21/02483 , H01L21/02565 , H01L21/02581 , H01L21/3115 , H01L21/8232 , H01L21/823418 , H01L29/0653 , H01L29/083 , H01L29/0834 , H01L29/0847 , H01L29/161 , H01L29/205 , H01L29/24 , H01L29/267 , H01L29/66795 , H01L29/66977 , H01L29/7391 , H01L29/772 , H01L29/78 , H01L29/785 , H01L29/78681 , H01L29/7869 , H01L29/78693
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a symmetric tunnel field effect transistor and methods of manufacture. The structure includes a gate structure including a source region and a drain region both of which comprise a doped VO2 region.
Abstract translation: 本公开涉及半导体结构,更具体地,涉及对称隧道场效应晶体管及其制造方法。 该结构包括包括源极区和漏极区的栅结构,二者都包括掺杂的VO2区。
-
公开(公告)号:US09876084B2
公开(公告)日:2018-01-23
申请号:US15084144
申请日:2016-03-29
Applicant: International Business Machines Corporation
Inventor: Mohit Bajaj , Suresh Gundapaneni , Aniruddha Konar , Narasimha R. Mavilla , Kota V. R. M. Murali , Edward J. Nowak
IPC: H01L29/417 , H01L29/66 , H01L29/267 , H01L29/78 , H01L21/02 , H01L29/786 , H01L29/772 , H01L29/739 , H01L29/06 , H01L29/08 , H01L29/24 , H01L21/3115 , H01L21/8232 , H01L21/8234
CPC classification number: H01L29/41725 , H01L21/02414 , H01L21/02483 , H01L21/02565 , H01L21/02581 , H01L21/3115 , H01L21/8232 , H01L21/823418 , H01L29/0653 , H01L29/083 , H01L29/0834 , H01L29/0847 , H01L29/161 , H01L29/205 , H01L29/24 , H01L29/267 , H01L29/66795 , H01L29/66977 , H01L29/7391 , H01L29/772 , H01L29/78 , H01L29/785 , H01L29/78681 , H01L29/7869 , H01L29/78693
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a symmetric tunnel field effect transistor and methods of manufacture. The structure includes a gate structure including a source region and a drain region both of which comprise a doped VO2 region.
-
公开(公告)号:US09508930B2
公开(公告)日:2016-11-29
申请号:US15132675
申请日:2016-04-19
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mohit Bajaj , Arpan K. Deb , Aniruddha Konar , Kota V. R. M. Murali , Rajan K. Pandey , Kumar R. Virwani
IPC: H01L21/28 , H01L21/44 , H01L29/40 , H01L33/02 , H01L45/00 , H01L29/861 , H01L29/66 , H01L29/15 , H01L29/24
CPC classification number: H01L45/1666 , B82Y10/00 , H01L21/02568 , H01L21/0262 , H01L27/224 , H01L27/2409 , H01L29/157 , H01L29/24 , H01L29/66121 , H01L29/8618 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/16 , H01L45/1608 , H01L45/165 , Y10S977/76 , Y10S977/943
Abstract: The present invention relates generally to high current density access devices (ADs), and more particularly, to a structure and method of forming tunable voltage margin access diodes in phase change memory (PCM) blocks using layers of copper-containing mixed ionic-electronic conduction (MIEC) materials. Embodiments of the present invention may use layers MIEC material to form an access device that can supply high current-densities and operate reliably while being fabricated at temperatures that are compatible with standard BEOL processing. By varying the deposition technique and amount of MIEC material used, the voltage margin (i.e. the voltage at which the device turns on and the current is above the noise floor) of the access device may be tuned to specific operating conditions of different memory devices.
Abstract translation: 本发明一般涉及高电流密度访问装置(AD),更具体地说,涉及使用含铜混合离子电子传导层的相变存储器(PCM)块中形成可调电压余量存取二极管的结构和方法 (MIEC)材料。 本发明的实施例可以使用层MIEC材料来形成可以提供高电流密度并且在与标准BEOL处理兼容的温度下制造时可靠地操作的接入装置。 通过改变沉积技术和使用的MIEC材料的量,可将接入设备的电压余量(即器件导通的电压和电流高于本底噪声)调谐到不同存储器件的特定操作条件。
-
公开(公告)号:US20160133730A1
公开(公告)日:2016-05-12
申请号:US14876006
申请日:2015-10-06
Applicant: International Business Machines Corporation
Inventor: Mohit Bajaj , Suresh Gundapaneni , Aniruddha Konar , Kota V.R.M. Murali , Edward J. Nowak
CPC classification number: H01L29/66977 , H01L21/845 , H01L27/1211 , H01L29/0673 , H01L29/1033 , H01L29/42364 , H01L29/42372 , H01L29/4908 , H01L29/511 , H01L29/517 , H01L29/66795 , H01L29/7855 , H01L29/78645 , H01L29/78648 , H01L49/003
Abstract: Embodiments of the present disclosure provide an integrated circuit (IC) structure, which can include: a doped semiconductor layer having a substantially uniform doping profile; a first gate structure positioned on the doped semiconductor layer; and a second gate structure positioned on the doped semiconductor layer, the second gate structure including a metal-insulator transition material and a gate dielectric layer separating the metal-insulator transition material from the doped semiconductor layer.
-
公开(公告)号:US09705079B2
公开(公告)日:2017-07-11
申请号:US15343602
申请日:2016-11-04
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mohit Bajaj , Arpan K. Deb , Aniruddha Konar , Kota V. R. M. Murali , Rajan K. Pandey , Kumar R. Virwani
IPC: H01L29/24 , H01L29/16 , H01L45/00 , H01L27/24 , H01L27/22 , H01L29/861 , H01L21/02 , H01L29/66 , H01L29/15
CPC classification number: H01L45/1666 , B82Y10/00 , H01L21/02568 , H01L21/0262 , H01L27/224 , H01L27/2409 , H01L29/157 , H01L29/24 , H01L29/66121 , H01L29/8618 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/16 , H01L45/1608 , H01L45/165 , Y10S977/76 , Y10S977/943
Abstract: The present invention relates generally to high current density access devices (ADs), and more particularly, to a structure and method of forming tunable voltage margin access diodes in phase change memory (PCM) blocks using layers of copper-containing mixed ionic-electronic conduction (MIEC) materials. Embodiments of the present invention may use layers MIEC material to form an access device that can supply high current-densities and operate reliably while being fabricated at temperatures that are compatible with standard BEOL processing. By varying the deposition technique and amount of MIEC material used, the voltage margin (i.e. the voltage at which the device turns on and the current is above the noise floor) of the access device may be tuned to specific operating conditions of different memory devices.
-
公开(公告)号:US09613867B2
公开(公告)日:2017-04-04
申请号:US15084137
申请日:2016-03-29
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mohit Bajaj , Suresh Gundapaneni , Aniruddha Konar , Narasimha R. Mavilla , Kota V. R. M. Murali , Edward J. Nowak
IPC: H01L21/8234 , H01L21/3115 , H01L29/66 , H01L21/02 , H01L21/8232 , H01L29/786
CPC classification number: H01L29/41725 , H01L21/02414 , H01L21/02483 , H01L21/02565 , H01L21/02581 , H01L21/3115 , H01L21/8232 , H01L21/823418 , H01L29/0653 , H01L29/083 , H01L29/0834 , H01L29/0847 , H01L29/161 , H01L29/205 , H01L29/24 , H01L29/267 , H01L29/66795 , H01L29/66977 , H01L29/7391 , H01L29/772 , H01L29/78 , H01L29/785 , H01L29/78681 , H01L29/7869 , H01L29/78693
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a symmetric tunnel field effect transistor and methods of manufacture. The structure includes a gate structure including a source region and a drain region both of which comprise a doped VO2 region.
-
公开(公告)号:US20160284995A1
公开(公告)日:2016-09-29
申请号:US15132675
申请日:2016-04-19
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mohit Bajaj , Arpan K. Deb , Aniruddha Konar , Kota V. R. M. Murali , Rajan K. Pandey , Kumar R. Virwani
IPC: H01L45/00
CPC classification number: H01L45/1666 , B82Y10/00 , H01L21/02568 , H01L21/0262 , H01L27/224 , H01L27/2409 , H01L29/157 , H01L29/24 , H01L29/66121 , H01L29/8618 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/16 , H01L45/1608 , H01L45/165 , Y10S977/76 , Y10S977/943
Abstract: The present invention relates generally to high current density access devices (ADs), and more particularly, to a structure and method of forming tunable voltage margin access diodes in phase change memory (PCM) blocks using layers of copper-containing mixed ionic-electronic conduction (MIEC) materials. Embodiments of the present invention may use layers MIEC material to form an access device that can supply high current-densities and operate reliably while being fabricated at temperatures that are compatible with standard BEOL processing. By varying the deposition technique and amount of MIEC material used, the voltage margin (i.e. the voltage at which the device turns on and the current is above the noise floor) of the access device may be tuned to specific operating conditions of different memory devices.
-
公开(公告)号:US20160284870A1
公开(公告)日:2016-09-29
申请号:US14665261
申请日:2015-03-23
Applicant: International Business Machines Corporation
Inventor: Mohit Bajaj , Arpan K. Deb , Aniruddha Konar , Kota V. R. M. Murali , Rajan K. Pandey , Kumar R. Virwani
IPC: H01L29/861 , H01L29/24 , H01L29/15 , H01L29/66
CPC classification number: H01L45/1666 , B82Y10/00 , H01L21/02568 , H01L21/0262 , H01L27/224 , H01L27/2409 , H01L29/157 , H01L29/24 , H01L29/66121 , H01L29/8618 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/16 , H01L45/1608 , H01L45/165 , Y10S977/76 , Y10S977/943
Abstract: The present invention relates generally to high current density access devices (ADs), and more particularly, to a structure and method of forming tunable voltage margin access diodes in phase change memory (PCM) blocks using layers of copper-containing mixed ionic-electronic conduction (MIEC) materials. Embodiments of the present invention may use layers MIEC material to form an access device that can supply high current-densities and operate reliably while being fabricated at temperatures that are compatible with standard BEOL processing. By varying the deposition technique and amount of MIEC material used, the voltage margin (i.e. the voltage at which the device turns on and the current is above the noise floor) of the access device may be tuned to specific operating conditions of different memory devices.
Abstract translation: 本发明一般涉及高电流密度访问装置(AD),更具体地说,涉及使用含铜混合离子电子传导层的相变存储器(PCM)块中形成可调电压余量存取二极管的结构和方法 (MIEC)材料。 本发明的实施例可以使用层MIEC材料来形成可以提供高电流密度并且在与标准BEOL处理兼容的温度下制造时可靠地操作的接入装置。 通过改变沉积技术和使用的MIEC材料的量,可将接入设备的电压余量(即,器件导通的电压和电流高于本底噪声)调谐到不同存储器件的特定操作条件。
-
-
-
-
-
-
-
-
-