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公开(公告)号：US20210119118A1
公开(公告)日：2021-04-22
申请号：US17109318
申请日：2020-12-02
摘要： A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes (a) etching through at least a portion of a thickness of the surface region to create a first set of exposed areas in the form of multiple strips extending in a first direction, and (b) etching through at least a portion of a thickness of the surface region to create a second set of exposed areas in the form of multiple strips extending in a second direction. The first set of exposed areas and the second set of exposed areas may have multiple areas that overlap. The method may also include, (c) after the etching in (a) and (b), etching through at least a portion of the thickness of the magnetoresistive stack through the first set and second set of exposed areas.
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公开(公告)号：US20230100514A1
公开(公告)日：2023-03-30
申请号：US18045539
申请日：2022-10-11
摘要： Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry. In some embodiments, the magnetoresistive device structures are designed such that the devices are able to fit within the vertical dimensions of the integrated circuit associated with a single metal layer and a single layer of interlayer dielectric material. Integrating the processing for the magnetoresistive devices can include using the same standard interlayer dielectric material as used in the surrounding circuits on the integrated circuit as well as using standard vias to interconnect to at least one of the electrodes of the magnetoresistive devices.
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公开(公告)号：US20190221609A1
公开(公告)日：2019-07-18
申请号：US16245783
申请日：2019-01-11
IPC分类号： H01L27/22 , H01L43/02 , H01L23/522 , H01L23/528 , H01L43/12 , H01L21/768 , H01F10/32 , G11C11/16 , H01F41/34
CPC分类号： H01L27/228 , G11C11/161 , H01F10/3254 , H01F10/3272 , H01F10/3286 , H01F10/329 , H01F41/34 , H01L21/76802 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L27/222 , H01L43/02 , H01L43/12
摘要： A magnetoresistive device may include multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers and electrically conductive vias extending through the one more dielectric material layers. Each MTJ stack may include multiple MTJ bits arranged one on top of another and the electrically conductive vias may be configured to electrically access each MTJ bit of the multiple MTJ stacks.
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公开(公告)号：US20190140019A1
公开(公告)日：2019-05-09
申请号：US16183956
申请日：2018-11-08
摘要： An integrated circuit device includes a memory portion and a logic portion. The memory portion may include a plurality of magnetoresistive devices and the logic portion may include logic circuits. The memory portion may include a plurality of metal conductors separated by a first interlayer dielectric material (ILD), wherein the first ILD is a low-k ILD or an ultra low-k ILD. And, the logic portion may include a plurality of metal conductors separated by a second interlayer dielectric material (ILD).
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公开(公告)号：US20190043921A1
公开(公告)日：2019-02-07
申请号：US16143088
申请日：2018-09-26
CPC分类号： H01L27/222 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/12
摘要： Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry. In some embodiments, the magnetoresistive device structures are designed such that the devices are able to fit within the vertical dimensions of the integrated circuit associated with a single metal layer and a single layer of interlayer dielectric material. Integrating the processing for the magnetoresistive devices can include using the same standard interlayer dielectric material as used in the surrounding circuits on the integrated circuit as well as using standard vias to interconnect to at least one of the electrodes of the magnetoresistive devices.
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公开(公告)号：US20240107891A1
公开(公告)日：2024-03-28
申请号：US18526636
申请日：2023-12-01
摘要： A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.
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公开(公告)号：US20200373481A1
公开(公告)日：2020-11-26
申请号：US16989155
申请日：2020-08-10
摘要： A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.
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公开(公告)号：US20200287128A1
公开(公告)日：2020-09-10
申请号：US16881151
申请日：2020-05-22
摘要： A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes (a) etching through at least a portion of a thickness of the surface region to create a first set of exposed areas in the form of multiple strips extending in a first direction, and (b) etching through at least a portion of a thickness of the surface region to create a second set of exposed areas in the form of multiple strips extending in a second direction. The first set of exposed areas and the second set of exposed areas may have multiple areas that overlap. The method may also include, (c) after the etching in (a) and (b), etching through at least a portion of the thickness of the magnetoresistive stack through the first set and second set of exposed areas.
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公开(公告)号：US20200020852A1
公开(公告)日：2020-01-16
申请号：US16580025
申请日：2019-09-24
摘要： A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
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10.发明申请公开(公告)号：US20190173004A1
公开(公告)日：2019-06-06
申请号：US16202496
申请日：2018-11-28
发明人： Sarin A. DESHPANDE , Jon SLAUGHTER , Cong HAI , Hyunwoo YANG , Naganivetha THIYAGARAJAH , Shukai YE
摘要： A method of fabricating a magnetoresistive device includes etching a magnetoresistive stack using a first etching process to form one or more sidewalls, and etching the stack using a second etching process after forming the one or more sidewalls. Wherein, the second etching process may be relatively more isotropic than the first etching process.
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