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    MIDPOINT SENSING REFERENCE GENERATION FOR STT-MRAM
    1.
    发明申请
    MIDPOINT SENSING REFERENCE GENERATION FOR STT-MRAM 有权

    公开(公告)号：US20250061933A1

    公开(公告)日：2025-02-20

    申请号：US18934463

    申请日：2024-11-01

    Applicant: Everspin Technologies, Inc.

    Inventor： Syed M. ALAM ,  Yaojun ZHANG ,  Frederick NEUMEYER

    IPC: G11C11/16

    Abstract: The present disclosure is drawn to a magnetoresistive device including an array of memory cells arranged in rows and columns, each memory cell comprising a magnetic tunnel junction, each row comprising a word line, and each column comprising a bit line; a column select device that selects a bit line. The magnetoresistive device also includes a sense amplifier comprising a first input corresponding to a selected bit line, a second input corresponding to a reference bit line, and a data output. The plurality of columns comprise a reference column, the reference column comprising a conductive element coupled to the magnetic tunnel junctions in the reference column.

    Magnetic field sensor with increased SNR
    2.
    发明授权
    Magnetic field sensor with increased SNR 有权

    公开(公告)号：US12181539B2

    公开(公告)日：2024-12-31

    申请号：US18622584

    申请日：2024-03-29

    Applicant: Everspin Technologies, Inc.

    Inventor： Phillip G. Mather ,  Anuraag Mohan

    IPC: G01R33/09

    Abstract: Various means for improvement in signal-to-noise ratio (SNR) for a magnetic field sensor are disclosed for low power and high resolution magnetic sensing. The improvements may be done by reducing parasitic effects, increasing sense element packing density, interleaving a Z-axis layout to reduce a subtractive effect, and optimizing an alignment between a Z-axis sense element and a flux guide, etc.

    Magnetoresistive devices and methods therefor
    3.
    发明授权
    Magnetoresistive devices and methods therefor 有权

    公开(公告)号：US12052928B2

    公开(公告)日：2024-07-30

    申请号：US17397067

    申请日：2021-08-09

    Applicant: Everspin Technologies, Inc.

    Inventor： Jijun Sun

    IPC: H10N50/10 ,  G11C11/16 ,  H01F10/32 ,  H10B61/00 ,  H10N50/80 ,  H10N50/85

    CPC classification number: H10N50/10 ,  G11C11/161 ,  H01F10/3254 ,  H01F10/3272 ,  H10B61/20 ,  H10N50/80 ,  H10N50/85

    Abstract: A magnetoresistive stack may include: a fixed region having a fixed magnetic state, a spacer region, a first dielectric layer and a second dielectric layer, where both the first dielectric layer and the second dielectric layer are between the fixed region and the spacer region, and a free region between the first dielectric layer and the second dielectric layer. The free region may be configured to have a first magnetic state and a second magnetic state. The free region may include an interface layer, a multilayer structure, an insertion layer (e.g., a metallized insertion layer), one or more ferromagnetic layers (e.g., metallized ferromagnetic layers), and/or a transition layer (e.g., a metallized transition layer).

    Systems and methods for dual standby modes in memory
    4.
    发明授权
    Systems and methods for dual standby modes in memory 有权

    公开(公告)号：US12020770B2

    公开(公告)日：2024-06-25

    申请号：US18189738

    申请日：2023-03-24

    Applicant: Everspin Technologies, Inc.

    Inventor： Syed M. Alam

    IPC: G11C7/10 ,  G11C5/14

    CPC classification number: G11C7/1069 ,  G11C5/146 ,  G11C7/1045 ,  G11C7/1096

    Abstract: 1. The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.

    MAGNETIC FIELD SENSOR WITH INCREASED SNR
    7.
    发明公开
    MAGNETIC FIELD SENSOR WITH INCREASED SNR 审中-公开

    公开(公告)号：US20230243898A1

    公开(公告)日：2023-08-03

    申请号：US18298646

    申请日：2023-04-11

    Applicant: EVERSPIN TECHNOLOGIES, INC.

    Inventor： Phillip G. MATHER ,  Anuraag MOHAN

    IPC: G01R33/09

    CPC classification number: G01R33/093 ,  G01R33/098

    Abstract: Various means for improvement in signal-to-noise ratio (SNR) for a magnetic field sensor are disclosed for low power and high resolution magnetic sensing. The improvements may be done by reducing parasitic effects, increasing sense element packing density, interleaving a Z-axis layout to reduce a subtractive effect, and optimizing an alignment between a Z-axis sense element and a flux guide, etc.

    Systems and methods for dual standby modes in memory
    8.
    发明授权
    Systems and methods for dual standby modes in memory 有权

    公开(公告)号：US11651802B1

    公开(公告)日：2023-05-16

    申请号：US17455292

    申请日：2021-11-17

    Applicant: Everspin Technologies, Inc.

    Inventor： Syed M. Alam

    IPC: G11C7/10 ,  G11C5/14

    CPC classification number: G11C7/1069 ,  G11C5/146 ,  G11C7/1045 ,  G11C7/1096

    Abstract: The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.

    Systems and methods for implementing and managing persistent memory
    10.
    发明授权
    Systems and methods for implementing and managing persistent memory 有权

    公开(公告)号：US11436087B2

    公开(公告)日：2022-09-06

    申请号：US15993046

    申请日：2018-05-30

    Applicant: Everspin Technologies, Inc.

    Inventor： Pankaj Bishnoi ,  Trevor Sydney Smith ,  James MacDonald

    IPC: G06F11/00 ,  G06F11/14 ,  G06F1/30 ,  G06F3/06 ,  G06F12/02

    Abstract: The present disclosure is drawn to, among other things, a method of managing a memory device. In some aspects, the method includes receiving data to be stored in a storage memory, wherein the storage memory is coupled to the memory device, wherein the memory device includes a first memory type and a second memory type different from the first memory type; storing a first copy of the received data in the first memory type; storing a second copy of the received data in the second memory type; receiving indication of a power loss to the memory device; in response to receiving indication of the power loss, copying the second copy from the second memory type to the storage memory; detecting for power restoration to the memory device after the power loss; and in response to detecting power restoration to the memory device, restoring data to the first memory type by copying data from the second memory type to the first memory type.

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