公开(公告)号：US12204246B2

公开(公告)日：2025-01-21

申请号：US17342176

申请日：2021-06-08

Applicant: Applied Materials, Inc.

Inventor： Huixiong Dai ,  Mangesh Ashok Bangar ,  Srinivas D. Nemani ,  Steven Hiloong Welch ,  Ellie Y. Yieh ,  Dmitry Lubomirsky

IPC: G03F7/11 ,  C23C16/06 ,  G03F7/004 ,  G03F7/038 ,  G03F7/16 ,  G03F7/32 ,  G03F7/38 ,  G03F7/40

Abstract: A method for processing a substrate is described. The method includes forming a metal containing resist layer onto a substrate, patterning the metal containing resist layer, and performing a post exposure bake on the metal containing resist layer. The post exposure bake on the metal containing resist layer is a field guided post exposure bake operation and includes the use of an electric field to guide the ions or charged species within the metal containing resist layer. The field guided post exposure bake operation may be paired with a post development field guided bake operation.

公开(公告)号：US12201030B2

公开(公告)日：2025-01-14

申请号：US18231414

申请日：2023-08-08

Applicant: Applied Materials, Inc.

Inventor： Minrui Yu ,  Wenhui Wang ,  Jaesoo Ahn ,  Jong Mun Kim ,  Sahil Patel ,  Lin Xue ,  Chando Park ,  Mahendra Pakala ,  Chentsau Chris Ying ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H10N50/10 ,  G01R33/09 ,  G11C11/16 ,  H10B61/00 ,  H10N50/85 ,  H10N52/01 ,  H10N52/80

Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.

公开(公告)号：US11313034B2

公开(公告)日：2022-04-26

申请号：US15814497

申请日：2017-11-16

Applicant: APPLIED MATERIALS, INC.

Inventor： Weimin Zeng ,  Yong Cao ,  Daniel Lee Diehl ,  Huixiong Dai ,  Khoi Phan ,  Christopher Ngai ,  Rongjun Wang ,  Xianmin Tang

IPC: C23C14/35 ,  H01J37/34 ,  C23C14/06 ,  C23C14/00 ,  C23C14/34 ,  C23C14/14 ,  C23C14/22 ,  C23C14/54 ,  C23C14/04

Abstract: In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas and a hydrogen-containing gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein adjusting the flow rate of the hydrogen containing gas tunes the optical properties of the deposited amorphous silicon layer.

公开(公告)号：US10927451B2

公开(公告)日：2021-02-23

申请号：US16541688

申请日：2019-08-15

Applicant: APPLIED MATERIALS, INC.

Inventor： Bencherki Mebarki ,  Byeong Chan Lee ,  Huixiong Dai ,  Tejinder Singh ,  Joung Joo Lee ,  Xianmin Tang

IPC: C23C14/54 ,  C23C14/58 ,  C23C14/34 ,  H01L21/02

Abstract: Methods and apparatus for processing a substrate. The method, for example, includes directing a stream of material from a PVD source at a first non-perpendicular angle to selectively deposit the material on a top portion of one or more features on the substrate and form a first overhang and a second overhang extending beyond a third sidewall and a fourth sidewall that are arranged parallel and opposite to each other and at non-zero angles to a first sidewall and a second sidewall, the first sidewall and the second sidewall defining a length of the one or more features, and the third sidewall and fourth sidewall defining a width of the one or more features; performing an etch process to selectively remove some of the first sidewall and the second sidewall while keeping the third sidewall and fourth sidewall in intact and maintaining the width of the one or more features.

公开(公告)号：US10927450B2

公开(公告)日：2021-02-23

申请号：US16225443

申请日：2018-12-19

Applicant: APPLIED MATERIALS, INC.

Inventor： Bencherki Mebarki ,  Wenhui Wang ,  Huixiong Dai ,  Christopher Ngai ,  Joung Joo Lee ,  Xianmin Tang

IPC: C23C14/54 ,  H01L21/3213 ,  C23C14/34 ,  C23C14/50

Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method for processing a substrate includes: directing a stream of material from a PVD source toward a surface of a substrate at a first non-perpendicular angle to the plane of the surface to deposit the material on one or more features on the substrate and form a first overhang; etching the layer of the substrate beneath the features selective to the deposited material to form a first part of a pattern; removing the material from the features; directing the stream of material from the PVD source toward the surface of the substrate at a second non-perpendicular angle to the plane of the surface to deposit the material on the features on the substrate and form a second overhang; and etching the layer of the substrate beneath the features selective to the deposited material to form a second part of the pattern.

公开(公告)号：US09478421B2

公开(公告)日：2016-10-25

申请号：US14878514

申请日：2015-10-08

Applicant: Applied Materials, Inc.

Inventor： Christopher Dennis Bencher ,  Daniel Lee Diehl ,  Huixiong Dai ,  Yong Cao ,  Tingjun Xu ,  Weimin Zeng ,  Peng Xie

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/027 ,  H01L21/3105 ,  H01L21/311 ,  C23C14/00 ,  C23C14/06 ,  C23C14/14 ,  C23C14/35 ,  H01L21/308

CPC classification number: H01L21/0337 ,  C23C14/0042 ,  C23C14/06 ,  C23C14/14 ,  C23C14/351 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02266 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/3105 ,  H01L21/31138 ,  H01L21/31144

Abstract: The embodiments herein provides methods for forming a PVD silicon oxide or silicon rich oxide, or PVD SiN or silicon rich SiN, or SiC or silicon rich SiC, or combination of the preceding including a variation which includes controlled doping of hydrogen into the compounds heretofore referred to as SiOxNyCz:Hw, where w, x, y, and z can vary in concentration from 0% to 100%, is produced as a hardmask with optical properties that are substantially matched to the photo-resists at the exposure wavelength. Thus making the hardmask optically planarized with respect to the photo-resist. This allows for multiple sequences of litho and etches in the hardmask while the photo-resist maintains essentially no optical topography or reflectivity variations.

公开(公告)号：US20240194541A1

公开(公告)日：2024-06-13

申请号：US18077812

申请日：2022-12-08

Applicant: Applied Materials, Inc.

Inventor： John Hautala ,  Huixiong Dai

IPC: H01L21/66 ,  H01L21/027 ,  H01L21/768

CPC classification number: H01L22/26 ,  H01L21/0274 ,  H01L21/76816 ,  H01L22/12

Abstract: Methods of processing patterned photoresist to control tip-to-tip distance on a semiconductor workpiece are disclosed. The method is performed after the photoresist has been patterned and before the etching process is commenced. Two implants, using different species, are performed at high tilt angles. In certain embodiments, the tilt angle may be 45° or more. Further, the implants are performed at twist angles such that the trajectory of the ions is nearly parallel to the patterned photoresist lines. In this way, the ions from the two implants glance the top and sidewalls of the photoresist lines. Using this technique, the tip-to-tip distance between patterned photoresist lines may be reduced with minimal impact on the CD.

公开(公告)号：US11609505B2

公开(公告)日：2023-03-21

申请号：US17222696

申请日：2021-04-05

Applicant: Applied Materials, Inc.

Inventor： Mangesh Ashok Bangar ,  Gautam Pisharody ,  Lancelot Huang ,  Alan L. Tso ,  Douglas A. Buchberger, Jr. ,  Huixiong Dai ,  Dmitry Lubomirsky ,  Srinivas D. Nemani ,  Christopher Siu Wing Ngai

IPC: G03F7/20 ,  G01N27/10

Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for verification and re-use of process fluids. The apparatus generally includes a tool for performing lithography, and a recirculation path coupled to the tool. The recirculation path generally includes a collection unit coupled at first end to a first end of the tool, and a probe coupled at a first end to a second end of the collection unit, the probe for determining one or more characteristics of a fluid flowing from the tool. The recirculation path of the apparatus further generally includes a purification unit coupled at a first end to a third end of the collection unit, the purification unit further coupled at a second end to a second end of the probe, the purification unit for changing a characteristic of the fluid.

公开(公告)号：US11437284B2

公开(公告)日：2022-09-06

申请号：US16550784

申请日：2019-08-26

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L29/40 ,  H01L21/311 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.

公开(公告)号：US10930556B2

公开(公告)日：2021-02-23

申请号：US16558711

申请日：2019-09-03

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L21/033

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing selective deposition of masks in a three-color process.