公开(公告)号：US10930555B2

公开(公告)日：2021-02-23

申请号：US16558702

申请日：2019-09-03

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L21/033

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing selective deposition of overlapping masks in a three-color process.

公开(公告)号：US20200075408A1

公开(公告)日：2020-03-05

申请号：US16558702

申请日：2019-09-03

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L21/768 ,  H01L21/033 ,  H01L23/522

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing selective deposition of overlapping masks in a three-color process.

公开(公告)号：US12198985B2

公开(公告)日：2025-01-14

申请号：US17875527

申请日：2022-07-28

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L29/78 ,  H01L21/311 ,  H01L21/8234 ,  H01L29/40 ,  H01L29/66

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.

公开(公告)号：US20200075409A1

公开(公告)日：2020-03-05

申请号：US16558711

申请日：2019-09-03

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L21/768 ,  H01L21/033 ,  H01L23/522

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing selective deposition of masks in a three-color process.

公开(公告)号：US12201030B2

公开(公告)日：2025-01-14

申请号：US18231414

申请日：2023-08-08

Applicant: Applied Materials, Inc.

Inventor： Minrui Yu ,  Wenhui Wang ,  Jaesoo Ahn ,  Jong Mun Kim ,  Sahil Patel ,  Lin Xue ,  Chando Park ,  Mahendra Pakala ,  Chentsau Chris Ying ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H10N50/10 ,  G01R33/09 ,  G11C11/16 ,  H10B61/00 ,  H10N50/85 ,  H10N52/01 ,  H10N52/80

Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.

公开(公告)号：US10927450B2

公开(公告)日：2021-02-23

申请号：US16225443

申请日：2018-12-19

Applicant: APPLIED MATERIALS, INC.

Inventor： Bencherki Mebarki ,  Wenhui Wang ,  Huixiong Dai ,  Christopher Ngai ,  Joung Joo Lee ,  Xianmin Tang

IPC: C23C14/54 ,  H01L21/3213 ,  C23C14/34 ,  C23C14/50

Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method for processing a substrate includes: directing a stream of material from a PVD source toward a surface of a substrate at a first non-perpendicular angle to the plane of the surface to deposit the material on one or more features on the substrate and form a first overhang; etching the layer of the substrate beneath the features selective to the deposited material to form a first part of a pattern; removing the material from the features; directing the stream of material from the PVD source toward the surface of the substrate at a second non-perpendicular angle to the plane of the surface to deposit the material on the features on the substrate and form a second overhang; and etching the layer of the substrate beneath the features selective to the deposited material to form a second part of the pattern.

公开(公告)号：US11723283B2

公开(公告)日：2023-08-08

申请号：US16871779

申请日：2020-05-11

Applicant: Applied Materials, Inc.

Inventor： Minrui Yu ,  Wenhui Wang ,  Jaesoo Ahn ,  Jong Mun Kim ,  Sahil Patel ,  Lin Xue ,  Chando Park ,  Mahendra Pakala ,  Chentsau Chris Ying ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H10N50/10 ,  G01R33/09 ,  G11C11/16 ,  H10B61/00 ,  H10N50/85 ,  H10N52/01 ,  H10N52/80

CPC classification number: H10N50/10 ,  G01R33/095 ,  G01R33/098 ,  G11C11/161 ,  H10B61/00 ,  H10N50/85 ,  H10N52/01 ,  H10N52/80

Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.

公开(公告)号：US20220367285A1

公开(公告)日：2022-11-17

申请号：US17875527

申请日：2022-07-28

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L21/8234 ,  H01L29/78 ,  H01L21/311 ,  H01L29/40 ,  H01L29/66

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.

公开(公告)号：US10957590B2

公开(公告)日：2021-03-23

申请号：US16669082

申请日：2019-10-30

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai ,  Liqi Wu ,  Wenyu Zhang ,  Yongmei Chen ,  Hao Chen ,  Keith Tatseun Wong ,  Ke Chang

IPC: H01L21/768 ,  H01L23/535 ,  H01L21/02 ,  H01L21/033 ,  H01L21/311

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.

公开(公告)号：US20200075422A1

公开(公告)日：2020-03-05

申请号：US16550784

申请日：2019-08-26

Applicant: Applied Materials, Inc.

Inventor： Wenhui Wang ,  Huixiong Dai ,  Christopher S. Ngai

IPC: H01L21/8234 ,  H01L29/78 ,  H01L29/66 ,  H01L29/40 ,  H01L21/311

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.