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    Selective deposition of metal oxide by pulsed chemical vapor deposition
    3.
    发明授权
    Selective deposition of metal oxide by pulsed chemical vapor deposition 有权

    公开(公告)号：US11993842B2

    公开(公告)日：2024-05-28

    申请号：US18072392

    申请日：2022-11-30

    Applicant: Applied Materials, Inc. ,  The Regents of the University of California

    Inventor： Keith Tatseun Wong ,  Srinivas D. Nemani ,  Andrew C. Kummel ,  James Huang ,  Yunil Cho

    IPC: C23C16/455 ,  C23C16/40 ,  C23C28/04

    CPC classification number: C23C16/405 ,  C23C16/45523 ,  C23C28/04

    Abstract: Embodiments described and discussed herein provide methods for selectively depositing a metal oxides on a substrate. In one or more embodiments, methods for forming a metal oxide material includes positioning a substrate within a processing chamber, where the substrate has passivated and non-passivated surfaces, exposing the substrate to a first metal alkoxide precursor to selectively deposit a first metal oxide layer on or over the non-passivated surface, and exposing the substrate to a second metal alkoxide precursor to selectively deposit a second metal oxide layer on the first metal oxide layer. The method also includes sequentially repeating exposing the substrate to the first and second metal alkoxide precursors to produce a laminate film containing alternating layers of the first and second metal oxide layers. Each of the first and second metal alkoxide precursors contains a different metal selected from titanium, zirconium, hafnium, aluminum, or lanthanum.

    High selectivity atomic later deposition process
    6.
    发明授权
    High selectivity atomic later deposition process 有权

    公开(公告)号：US11664215B2

    公开(公告)日：2023-05-30

    申请号：US16802290

    申请日：2020-02-26

    Applicant: Applied Materials, Inc.

    Inventor： Christopher Ahles ,  Jong Choi ,  Andrew C. Kummel ,  Keith Tatseun Wong ,  Srinivas D. Nemani

    IPC: H01L21/02 ,  C23C16/40 ,  C23C16/455

    CPC classification number: H01L21/02186 ,  C23C16/405 ,  C23C16/45527 ,  C23C16/45553 ,  H01L21/0228 ,  H01L21/02205

    Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one example, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a carboxylic acid to the surface of the substrate, and forming a metal containing material selectively on a first material of the substrate. In another example, a method of forming a metal containing material on a substrate includes selectively forming a metal containing layer on a silicon material or a metal material on a substrate than on an insulating material on the substrate by an atomic layer deposition process by alternatively supplying a metal containing precursor and a water free precursor to the substrate.

    HIGH-PRESSURE ANNEALING AND REDUCING WET ETCH RATES
    9.
    发明申请
    HIGH-PRESSURE ANNEALING AND REDUCING WET ETCH RATES 审中-公开

    公开(公告)号：US20180122630A1

    公开(公告)日：2018-05-03

    申请号：US15360016

    申请日：2016-11-23

    Applicant: Applied Materials, Inc.

    Inventor： Kurtis S. Leschkies ,  Keith Tatseun Wong ,  Steven Verhaverbeke

    IPC: H01L21/02

    CPC classification number: H01L21/02203 ,  H01L21/02337

    Abstract: Methods are described for reducing the wet etch rate of dielectric films formed on a patterned substrate by flowing the material into gaps during deposition. Films deposited in this manner may initially exhibit elevated wet etch rates. The dielectric films are treated by exposing the patterned substrate to a high pressure of water vapor in the gas phase. The treatment may reduce the wet etch rate of the dielectric films, especially the gapfill portion of the dielectric film. Scanning electron microscopy has confirmed that the quantity and/or size of pores is reduced or eliminated by the procedures described herein. The treatment has also been found to reduce the etch rate, e.g., at the bottom of gaps filled with the dielectric film.

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